Lines Matching defs:AN
119 /// represented as an indexed [r+r] operation. Returns false if it can
126 /// represented as an indexed [r+r] operation.
142 /// Reg in an asm, because the load or store opcode would have to change.
372 /// SelectBitfieldInsert - turn an or of two masked values into
575 /// If this returns with Other != -1, then the returned comparison is an or of
671 SDValue AN = SDValue(CurDAG->getMachineNode(PPC::AND, dl, MVT::i32, AD,
673 SDValue Ops[] = { AN, getI32Imm(1), getI32Imm(31), getI32Imm(31) };
720 // Otherwise, we have to turn an operation like SETONE -> SETOLT | SETOGT.
930 // If this is an and of a value rotated between 0 and 31 bits and then and'd
