Lines Matching defs:BaseReg
176 unsigned BaseReg;
225 return Mem.BaseReg;
425 Res->Mem.BaseReg = 0;
434 unsigned BaseReg, unsigned IndexReg,
439 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
447 Res->Mem.BaseReg = BaseReg;
458 unsigned basereg = is64BitMode() ? X86::RSI : X86::ESI;
464 Op.Mem.BaseReg == basereg && Op.Mem.IndexReg == 0);
468 unsigned basereg = is64BitMode() ? X86::RDI : X86::EDI;
474 Op.Mem.BaseReg == basereg && Op.Mem.IndexReg == 0;
604 unsigned BaseReg = 0, IndexReg = 0, Scale = 1;
608 // Parse [ BaseReg + Scale*IndexReg + Disp ] or [ symbol ]
616 // Parse BaseReg
617 if (ParseRegister(BaseReg, Start, End)) {
685 if (!BaseReg && !IndexReg)
688 return X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale,
784 /// ParseMemOperand: segment: disp(basereg, indexreg, scale). The '%ds:' prefix
840 unsigned BaseReg = 0, IndexReg = 0, Scale = 1;
845 if (ParseRegister(BaseReg, StartLoc, EndLoc)) return 0;
846 if (BaseReg == X86::EIZ || BaseReg == X86::RIZ) {
919 if (BaseReg != 0 && IndexReg != 0) {
920 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg) &&
926 if (X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg) &&
934 return X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale,
1077 Op.Mem.BaseReg == MatchRegisterName("dx") && Op.Mem.IndexReg == 0) {
1079 Operands.back() = X86Operand::CreateReg(Op.Mem.BaseReg, Loc, Loc);
1090 Op.Mem.BaseReg == MatchRegisterName("dx") && Op.Mem.IndexReg == 0) {
1092 Operands.begin()[1] = X86Operand::CreateReg(Op.Mem.BaseReg, Loc, Loc);
