Lines Matching refs:Desc
71 void emitInstruction(MachineInstr &MI, const MCInstrDesc *Desc);
133 const MCInstrDesc &Desc = I->getDesc();
134 emitInstruction(*I, &Desc);
136 if (Desc.getOpcode() == X86::MOVPC32r)
151 const MCInstrDesc &Desc = MI.getDesc();
154 if ((Desc.TSFlags & X86II::FormMask) == X86II::Pseudo)
156 if (Desc.TSFlags & X86II::REX_W)
159 unsigned NumOps = Desc.getNumOperands();
162 Desc.getOperandConstraint(1, MCOI::TIED_TO) != -1;
175 switch (Desc.TSFlags & X86II::FormMask) {
594 const MCInstrDesc *Desc = &II->get(Opcode);
595 MI.setDesc(*Desc);
596 return Desc;
601 const MCInstrDesc *Desc) {
605 switch (Desc->getOpcode()) {
606 case X86::ADD16rr_DB: Desc = UpdateOp(MI, II, X86::OR16rr); break;
607 case X86::ADD32rr_DB: Desc = UpdateOp(MI, II, X86::OR32rr); break;
608 case X86::ADD64rr_DB: Desc = UpdateOp(MI, II, X86::OR64rr); break;
609 case X86::ADD16ri_DB: Desc = UpdateOp(MI, II, X86::OR16ri); break;
610 case X86::ADD32ri_DB: Desc = UpdateOp(MI, II, X86::OR32ri); break;
611 case X86::ADD64ri32_DB: Desc = UpdateOp(MI, II, X86::OR64ri32); break;
612 case X86::ADD16ri8_DB: Desc = UpdateOp(MI, II, X86::OR16ri8); break;
613 case X86::ADD32ri8_DB: Desc = UpdateOp(MI, II, X86::OR32ri8); break;
614 case X86::ADD64ri8_DB: Desc = UpdateOp(MI, II, X86::OR64ri8); break;
615 case X86::ACQUIRE_MOV8rm: Desc = UpdateOp(MI, II, X86::MOV8rm); break;
616 case X86::ACQUIRE_MOV16rm: Desc = UpdateOp(MI, II, X86::MOV16rm); break;
617 case X86::ACQUIRE_MOV32rm: Desc = UpdateOp(MI, II, X86::MOV32rm); break;
618 case X86::ACQUIRE_MOV64rm: Desc = UpdateOp(MI, II, X86::MOV64rm); break;
619 case X86::RELEASE_MOV8mr: Desc = UpdateOp(MI, II, X86::MOV8mr); break;
620 case X86::RELEASE_MOV16mr: Desc = UpdateOp(MI, II, X86::MOV16mr); break;
621 case X86::RELEASE_MOV32mr: Desc = UpdateOp(MI, II, X86::MOV32mr); break;
622 case X86::RELEASE_MOV64mr: Desc = UpdateOp(MI, II, X86::MOV64mr); break;
628 unsigned Opcode = Desc->Opcode;
631 if (Desc->TSFlags & X86II::LOCK)
635 switch (Desc->TSFlags & X86II::SegOvrMask) {
647 if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP)
651 if (Desc->TSFlags & X86II::OpSize)
655 if (Desc->TSFlags & X86II::AdSize)
659 switch (Desc->TSFlags & X86II::Op0Mask) {
682 (((Desc->TSFlags & X86II::Op0Mask)-X86II::D8)
699 switch (Desc->TSFlags & X86II::Op0Mask) {
718 unsigned NumOps = Desc->getNumOperands();
720 if (NumOps > 1 && Desc->getOperandConstraint(1, MCOI::TIED_TO) != -1)
722 else if (NumOps > 2 && Desc->getOperandConstraint(NumOps-1,MCOI::TIED_TO)== 0)
726 unsigned char BaseOpcode = X86II::getBaseOpcodeFor(Desc->TSFlags);
727 switch (Desc->TSFlags & X86II::FormMask) {
762 emitConstant(0, X86II::getSizeOfImm(Desc->TSFlags));
813 emitConstant(Imm, X86II::getSizeOfImm(Desc->TSFlags));
815 emitConstant(MO.getImm(), X86II::getSizeOfImm(Desc->TSFlags));
827 unsigned Size = X86II::getSizeOfImm(Desc->TSFlags);
860 X86II::getSizeOfImm(Desc->TSFlags));
871 X86II::getSizeOfImm(Desc->TSFlags));
882 X86II::getSizeOfImm(Desc->TSFlags));
889 X86II::getSizeOfImm(Desc->TSFlags) : 0;
897 X86II::getSizeOfImm(Desc->TSFlags));
907 (Desc->TSFlags & X86II::FormMask)-X86II::MRM0r);
913 unsigned Size = X86II::getSizeOfImm(Desc->TSFlags);
942 X86II::getSizeOfImm(Desc->TSFlags) : 4) : 0;
945 emitMemModRMByte(MI, CurOp, (Desc->TSFlags & X86II::FormMask)-X86II::MRM0m,
953 unsigned Size = X86II::getSizeOfImm(Desc->TSFlags);
