Lines Matching refs:I16
598 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
601 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
1288 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
1290 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
1545 case MVT::i16:
1647 I16,
1746 case MVT::i16:
1753 Opc = AtomicOpcTbl[Op][I16];
1879 if (LdVT != MVT::i64 && LdVT != MVT::i32 && LdVT != MVT::i16 &&
1929 if (LdVT == MVT::i16) return X86::DEC16m;
1935 if (LdVT == MVT::i16) return X86::INC16m;
1999 // i8 is unshrinkable, i16 should be promoted to i32.
2070 case MVT::i16: LoReg = X86::AX; Opc = X86::MUL16r; break;
2098 case MVT::i16: Opc = X86::MUL16r; MOpc = X86::MUL16m; break;
2106 case MVT::i16: Opc = X86::IMUL16r; MOpc = X86::IMUL16m; break;
2116 case MVT::i16: LoReg = X86::AX; HiReg = X86::DX; break;
2152 X86::AX, MVT::i16, InFlag);
2161 Result = SDValue(CurDAG->getMachineNode(X86::SHR16ri, dl, MVT::i16,
2198 case MVT::i16: Opc = X86::DIV16r; MOpc = X86::DIV16m; break;
2206 case MVT::i16: Opc = X86::IDIV16r; MOpc = X86::IDIV16m; break;
2221 case MVT::i16:
2298 X86::AX, MVT::i16, InFlag);
2309 Result = SDValue(CurDAG->getMachineNode(X86::SHR16ri, dl, MVT::i16,
2365 case MVT::i16: TRC = &X86::GR16_ABCDRegClass; break;
2395 case MVT::i16: TRC = &X86::GR16_ABCDRegClass; break;
2415 N0.getValueType() != MVT::i16 &&
2418 SDValue Imm = CurDAG->getTargetConstant(C->getZExtValue(), MVT::i16);
2423 MVT::i16, Reg);