Lines Matching refs:Index
202 SDValue &Scale, SDValue &Index, SDValue &Disp,
205 SDValue &Scale, SDValue &Index, SDValue &Disp,
208 SDValue &Scale, SDValue &Index, SDValue &Disp,
212 SDValue &Index, SDValue &Disp,
218 SDValue &Index, SDValue &Disp,
230 SDValue &Scale, SDValue &Index,
236 Index = AM.IndexReg;
556 // On 64-bit platforms, we can run into an issue where a frame index
558 // will overflow the displacement field. Assuming that the frame index
574 // we do not try to use an unsafe Disp with a frame index.
628 // Base and index reg must be 0 in order to use %rip as base.
704 // a smaller encoding and avoids a scaled-index.
743 // a scaled index. Returns false if the simplification is performed.
1094 // the index field with the index field unused, use -B as the index.
1098 // it costs an additional mov if the index register has other uses.
1110 // Test if the index field is free for use.
1249 // If so, check to see if the scale index register is set.
1274 SDValue &Scale, SDValue &Index,
1305 getAddressOperands(AM, Base, Scale, Index, Disp, Segment);
1318 SDValue &Scale, SDValue &Index,
1328 if (!SelectAddr(LD, LD->getBasePtr(), Base, Scale, Index, Disp, Segment))
1346 if (!SelectAddr(LD, LD->getBasePtr(), Base, Scale, Index, Disp, Segment))
1359 SDValue &Index, SDValue &Disp,
1414 getAddressOperands(AM, Base, Scale, Index, Disp, Segment);
1420 SDValue &Scale, SDValue &Index,
1438 getAddressOperands(AM, Base, Scale, Index, Disp, Segment);
1445 SDValue &Index, SDValue &Disp,
1453 N.getOperand(1), Base, Scale, Index, Disp, Segment);
1714 // Which index into the table.
2475 SDValue Base, Scale, Index, Disp, Segment;
2477 Base, Scale, Index, Disp, Segment))
2483 const SDValue Ops[] = { Base, Scale, Index, Disp, Segment, InputChain };
