Cross Reference: /external/llvm/lib/Target/X86/X86ISelLowering.cpp

Lines Matching refs:CMOV
437   // X86 wants to expand cmov itself.
3130 /// hasFPCMov - is there a floating point cmov for the specific X86 condition
3131 /// code. Current x86 isa includes the following FP cmov instructions:
7490     Hi = DAG.getNode(X86ISD::CMOV, dl, VT, Ops0, 4);
7491     Lo = DAG.getNode(X86ISD::CMOV, dl, VT, Ops1, 4);
7493     Lo = DAG.getNode(X86ISD::CMOV, dl, VT, Ops0, 4);
7494     Hi = DAG.getNode(X86ISD::CMOV, dl, VT, Ops1, 4);
8696   // X86ISD::CMOV means set the result (which is operand 1) to the RHS if
8700   return DAG.getNode(X86ISD::CMOV, DL, VTs, Ops, array_lengthof(Ops));
10092   Op = DAG.getNode(X86ISD::CMOV, dl, OpVT, Ops, array_lengthof(Ops));
10145   return DAG.getNode(X86ISD::CMOV, dl, VT, Ops, array_lengthof(Ops));
11093   case X86ISD::CMOV:               return "X86ISD::CMOV";
11620   //     cmov[cond] t2 = t1
13580 /// Optimize X86ISD::CMOV [LHS, RHS, CONDCODE (e.g. X86::COND_NE), CONDVAL]
13585   // If the flag operand isn't dead, don't touch this CMOV.
15088   case X86ISD::CMOV:        return PerformCMOVCombine(N, DAG, DCI);
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