Lines Matching refs:Lower
10 // This file defines the interfaces that X86 uses to lower LLVM code into a
586 // Lower this to FGETSIGNx86 plus an AND.
877 // Custom lower build_vector, vector_shuffle, and extract_vector_elt.
880 // Do not attempt to custom lower non-power-of-2 vectors
883 // Do not attempt to custom lower non-128-bit vectors
929 // Custom lower v2i64 and v2f64 selects.
1088 // Don't lower v32i8 because there is no 128-bit byte mul
1113 // Don't lower v32i8 because there is no 128-bit byte mul
1124 // Custom lower several nodes for 256-bit types.
1135 // Do not attempt to custom lower other non-256-bit vectors
1177 // We want to custom lower some of our intrinsics.
1181 // Only custom-lower 64-bit SADDO and friends on 64-bit because we don't
1345 // Do not use f64 to lower memcpy if source is string constant. It's
1628 /// LowerCallResult - Lower the result values of a call into the
2191 // Lower arguments at fp - stackoffset + fpdiff.
2350 // For tail calls lower the arguments to the 'real' stack slot.
2628 // Mask out lower bits, add stackalignment once plus the 12 bytes.
3202 // Lower quadword copied in order or undef.
3224 // Lower quadword shuffled.
4033 /// match movhlps. The lower half elements should come from upper half of
4088 /// match movlp{s|d}. The lower half elements should come from lower half of
4303 // refer to the higher part, which is a duplication of the lower one,
4645 /// LowerBuildVectorv16i8 - Custom lower build_vector of v16i8.
4693 /// LowerBuildVectorv8i16 - Custom lower build_vector of v8i16.
5210 // Build both the lower and upper subvector.
5211 SDValue Lower = DAG.getNode(ISD::BUILD_VECTOR, dl, HVT, &V[0], NumElems/2);
5215 // Recreate the wider vector with the lower and upper part.
5216 SDValue Vec = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT), Lower,
5410 // Try to lower a shuffle node into a simple blend instruction.
6412 assert(VT.getSizeInBits() != 64 && "Can't lower MMX shuffles");
6674 // lower it into other known shuffles. FIXME: this isn't true yet, but
6836 // Note if the lower 64 bits of the result of the UNPCKHPD is then stored
6983 // Lower a node with an EXTRACT_SUBVECTOR opcode. This may result in
7001 // Lower a node with an INSERT_SUBVECTOR opcode. This may result in a
7246 // Lower ISD::GlobalTLSAddress using the "general dynamic" model, 32 bit
7260 // Lower ISD::GlobalTLSAddress using the "general dynamic" model, 64 bit
7268 // Lower ISD::GlobalTLSAddress using the "initial exec" (for no-pic) or
7345 // Darwin only has one model of TLS. Lower to that.
7455 /// LowerShiftParts - Lower SRA_PARTS and friends, which return two i32 values
7509 "Unknown SINT_TO_FP to lower!");
7807 "Unknown FP_TO_INT to lower!");
7818 // We lower FP->int64 either into FISTP64 followed by a load from a temporary
7830 default: llvm_unreachable("Invalid FP_TO_SINT to lower!");
7842 assert(DstTy == MVT::i64 && "Invalid FP_TO_SINT to lower!");
8058 // Lower ISD::FGETSIGN to (AND (X86ISD::FGETSIGNx86 ...) 1).
8306 // Lower (X & (1 << N)) == 0 to BT(X, N).
8307 // Lower ((X >>u N) & 1) != 0 to BT(X, N).
8308 // Lower ((X >>s N) & 1) != 0 to BT(X, N).
8989 // Lower dynamic stack allocation to _alloca call for Cygwin/Mingw targets.
9239 default: return SDValue(); // Don't custom lower most intrinsics.
9604 // return an integer value, not just an instruction so lower it to the ptest
10201 "Only know how to lower V2I64/V4I64 multiply");
10361 // Lower SHL with variable shift amount.
10469 // Lower the "add/sub/mul with overflow" instruction into a regular ins plus
10824 default: llvm_unreachable("Should not custom lower this!");
11222 // If lower 4G is not available, then we must use rip-relative addressing.
14539 // If we are a 64-bit capable x86, lower to a single movq load/store pair.
14560 // Otherwise, lower to two pairs of 32-bit loads / stores.
14894 // Use vpunpcklwd for 4 lower elements v8i16 -> v4i32.
14896 // Concat upper and lower parts.
14899 // Use vpunpckldq for 4 lower elements v4i32 -> v2i64.
14901 // Concat upper and lower parts.
15275 // lower so don't worry about this.
15507 /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
