Lines Matching refs:Regs
37 assert(Registers.size() <= 0xffff && "Too many regs to fit in tables");
134 const CodeGenRegister::Set &Regs = RC.getMembers();
135 if (Regs.empty())
140 OS << " {" << (*Regs.begin())->getWeight(RegBank)
199 const std::vector<CodeGenRegister*> &Regs,
207 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
208 Record *Reg = Regs[i]->TheDef;
226 std::string Namespace = Regs[0]->TheDef->getValueAsString("Namespace");
274 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
275 Record *Reg = Regs[i]->TheDef;
325 const std::vector<CodeGenRegister*> &Regs,
330 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
331 Record *Reg = Regs[i]->TheDef;
339 std::string Namespace = Regs[0]->TheDef->getValueAsString("Namespace");
453 const std::vector<CodeGenRegister*> &Regs = RegBank.getRegisters();
460 SmallVector<RegVec, 4> SubRegLists(Regs.size());
461 SmallVector<RegVec, 4> OverlapLists(Regs.size());
465 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
466 const CodeGenRegister *Reg = Regs[i];
520 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
521 const CodeGenRegister *Reg = Regs[i];
595 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
596 const CodeGenRegister::SubRegMap &SRM = Regs[i]->getSubRegs();
597 OS << " /* " << Regs[i]->TheDef->getName() << " */\n";
622 EmitRegMappingTables(OS, Regs, false);
629 << Regs.size()+1 << ", RA, " << TargetName << "MCRegisterClasses, "
637 EmitRegMapping(OS, Regs, false);
899 const std::vector<CodeGenRegister*> &Regs = RegBank.getRegisters();
900 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
901 const CodeGenRegister &Reg = *Regs[i];
1054 EmitRegMappingTables(OS, Regs, true);
1062 << Regs.size()+1 << ", RA,\n " << TargetName
1072 EmitRegMapping(OS, Regs, true);
1082 const SetTheory::RecVec *Regs = RegBank.getSets().expand(CSRSet);
1083 assert(Regs && "Cannot expand CalleeSavedRegs instance");
1088 for (unsigned r = 0, re = Regs->size(); r != re; ++r)
1089 OS << getQualifiedName((*Regs)[r]) << ", ";
1095 printBitVectorAsHex(OS, RegBank.computeCoveredRegisters(*Regs), 32);
