Lines Matching full:generate
67 "Generate machine code emitter"),
69 "Generate registers and register classes info"),
71 "Generate instruction descriptions"),
73 "Generate calling convention descriptions"),
75 "Generate assembly writer"),
77 "Generate disassembler"),
79 "Generate pseudo instruction lowering"),
81 "Generate assembly instruction matcher"),
83 "Generate a DAG instruction selector"),
85 "Generate DFA Packetizer for VLIW targets"),
87 "Generate a \"fast\" instruction selector"),
89 "Generate subtarget enumerations"),
91 "Generate intrinsic information"),
93 "Generate target intrinsic information"),
95 "Generate enhanced disassembly info"),
