Lines Matching refs:Instr
144 Instr* pc = reinterpret_cast<Instr*>(pc_);
145 Instr* instr = reinterpret_cast<Instr*>(instructions);
147 *(pc + i) = *(instr + i);
239 const Instr kPopInstruction =
244 const Instr kPushRegPattern =
248 const Instr kPopRegPattern =
251 const Instr kMovLrPc = al | MOV | kRegister_pc_Code | kRegister_lr_Code * B12;
253 const Instr kLdrPCMask = kCondMask | 15 * B24 | 7 * B20 | 15 * B16;
254 const Instr kLdrPCPattern = al | 5 * B24 | L | kRegister_pc_Code * B16;
256 const Instr kBlxRegMask =
258 const Instr kBlxRegPattern =
260 const Instr kBlxIp = al | kBlxRegPattern | ip.code();
261 const Instr kMovMvnMask = 0x6d * B21 | 0xf * B16;
262 const Instr kMovMvnPattern = 0xd * B21;
263 const Instr kMovMvnFlip = B22;
264 const Instr kMovLeaveCCMask = 0xdff * B16;
265 const Instr kMovLeaveCCPattern = 0x1a0 * B16;
266 const Instr kMovwMask = 0xff * B20;
267 const Instr kMovwPattern = 0x30 * B20;
268 const Instr kMovwLeaveCCFlip = 0x5 * B21;
269 const Instr kCmpCmnMask = 0xdd * B20 | 0xf * B12;
270 const Instr kCmpCmnPattern = 0x15 * B20;
271 const Instr kCmpCmnFlip = B21;
272 const Instr kAddSubFlip = 0x6 * B21;
273 const Instr kAndBicFlip = 0xe * B21;
276 const Instr kLdrRegFpOffsetPattern =
278 const Instr kStrRegFpOffsetPattern =
280 const Instr kLdrRegFpNegOffsetPattern =
282 const Instr kStrRegFpNegOffsetPattern =
284 const Instr kLdrStrInstrTypeMask = 0xffff0000;
285 const Instr kLdrStrInstrArgumentMask = 0x0000ffff;
286 const Instr kLdrStrOffsetMask = 0x00000fff;
377 Condition Assembler::GetCondition(Instr instr) {
378 return Instruction::ConditionField(instr);
382 bool Assembler::IsBranch(Instr instr) {
383 return (instr & (B27 | B25)) == (B27 | B25);
387 int Assembler::GetBranchOffset(Instr instr) {
388 ASSERT(IsBranch(instr));
391 return ((instr & kImm24Mask) << 8) >> 6;
395 bool Assembler::IsLdrRegisterImmediate(Instr instr) {
396 return (instr & (B27 | B26 | B25 | B22 | B20)) == (B26 | B20);
400 int Assembler::GetLdrRegisterImmediateOffset(Instr instr) {
401 ASSERT(IsLdrRegisterImmediate(instr));
402 bool positive = (instr & B23) == B23;
403 int offset = instr & kOff12Mask; // Zero extended offset.
408 Instr Assembler::SetLdrRegisterImmediateOffset(Instr instr, int offset) {
409 ASSERT(IsLdrRegisterImmediate(instr));
414 instr = (instr & ~B23) | (positive ? B23 : 0);
416 return (instr & ~kOff12Mask) | offset;
420 bool Assembler::IsStrRegisterImmediate(Instr instr) {
421 return (instr & (B27 | B26 | B25 | B22 | B20)) == B26;
425 Instr Assembler::SetStrRegisterImmediateOffset(Instr instr, int offset) {
426 ASSERT(IsStrRegisterImmediate(instr));
431 instr = (instr & ~B23) | (positive ? B23 : 0);
433 return (instr & ~kOff12Mask) | offset;
437 bool Assembler::IsAddRegisterImmediate(Instr instr) {
438 return (instr & (B27 | B26 | B25 | B24 | B23 | B22 | B21)) == (B25 | B23);
442 Instr Assembler::SetAddRegisterImmediateOffset(Instr instr, int offset) {
443 ASSERT(IsAddRegisterImmediate(instr));
447 return (instr & ~kOff12Mask) | offset;
451 Register Assembler::GetRd(Instr instr) {
453 reg.code_ = Instruction::RdValue(instr);
458 Register Assembler::GetRn(Instr instr) {
460 reg.code_ = Instruction::RnValue(instr);
465 Register Assembler::GetRm(Instr instr) {
467 reg.code_ = Instruction::RmValue(instr);
472 bool Assembler::IsPush(Instr instr) {
473 return ((instr & ~kRdMask) == kPushRegPattern);
477 bool Assembler::IsPop(Instr instr) {
478 return ((instr & ~kRdMask) == kPopRegPattern);
482 bool Assembler::IsStrRegFpOffset(Instr instr) {
483 return ((instr & kLdrStrInstrTypeMask) == kStrRegFpOffsetPattern);
487 bool Assembler::IsLdrRegFpOffset(Instr instr) {
488 return ((instr & kLdrStrInstrTypeMask) == kLdrRegFpOffsetPattern);
492 bool Assembler::IsStrRegFpNegOffset(Instr instr) {
493 return ((instr & kLdrStrInstrTypeMask) == kStrRegFpNegOffsetPattern);
497 bool Assembler::IsLdrRegFpNegOffset(Instr instr) {
498 return ((instr & kLdrStrInstrTypeMask) == kLdrRegFpNegOffsetPattern);
502 bool Assembler::IsLdrPcImmediateOffset(Instr instr) {
505 return (instr & (kLdrPCMask & ~kCondMask)) == 0x051f0000;
509 bool Assembler::IsTstImmediate(Instr instr) {
510 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) ==
515 bool Assembler::IsCmpRegister(Instr instr) {
516 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask | B4)) ==
521 bool Assembler::IsCmpImmediate(Instr instr) {
522 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) ==
527 Register Assembler::GetCmpImmediateRegister(Instr instr) {
528 ASSERT(IsCmpImmediate(instr));
529 return GetRn(instr);
533 int Assembler::GetCmpImmediateRawImmediate(Instr instr) {
534 ASSERT(IsCmpImmediate(instr));
535 return instr & kOff12Mask;
554 Instr instr = instr_at(pos);
555 instr & ~kImm24Mask) == 0) {
557 return instr - (Code::kHeaderSize - kHeapObjectTag);
559 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx imm24
560 int imm26 = ((instr & kImm24Mask) << 8) >> 6;
561 if ((Instruction::ConditionField(instr) == kSpecialCondition) &&
562 ((instr & B24) != 0)) {
571 Instr instr = instr_at(pos);
572 if ((instr & ~kImm24Mask) == 0) {
580 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx imm24
581 if (Instruction::ConditionField(instr) == kSpecialCondition) {
584 instr = (instr & ~(B24 | kImm24Mask)) | ((imm26 & 2) >> 1)*B24;
587 instr &= ~kImm24Mask;
591 instr_at_put(pos, instr | (imm24 & kImm24Mask));
605 Instr instr = instr_at(l.pos());
606 if ((instr & ~kImm24Mask) == 0) {
609 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx
610 Condition cond = Instruction::ConditionField(instr);
617 if ((instr & B24) != 0)
708 static Instr EncodeMovwImmediate(uint32_t immediate) {
721 Instr* instr) {
733 if (instr != NULL) {
734 if ((*instr & kMovMvnMask) == kMovMvnPattern) {
736 *instr ^= kMovMvnFlip;
738 } else if ((*instr & kMovLeaveCCMask) == kMovLeaveCCPattern) {
741 *instr ^= kMovwLeaveCCFlip;
742 *instr |= EncodeMovwImmediate(imm32);
748 } else if ((*instr & kCmpCmnMask) == kCmpCmnPattern) {
750 *instr ^= kCmpCmnFlip;
754 Instr alu_insn = (*instr & kALUMask);
758 *instr ^= kAddSubFlip;
764 *instr ^= kAndBicFlip;
793 bool Operand::is_single_instruction(Instr instr) const {
797 !fits_shifter(imm32_, &dummy1, &dummy2, &instr)) {
801 if ((instr & ~kCondMask) == 13*B21) { // mov, S not set
826 void Assembler::addrmod1(Instr instr,
831 ASSERT((instr & ~(kCondMask | kOpCodeMask | S)) == 0);
837 !fits_shifter(x.imm32_, &rotate_imm, &immed_8, &instr)) {
843 Condition cond = Instruction::ConditionField(instr);
844 if ((instr & ~kCondMask) == 13*B21) { // mov, S not set
858 (instr & kMovMvnMask) != kMovMvnPattern) {
864 addrmod1(instr, rn, rd, Operand(ip));
868 instr |= I | rotate_imm*B8 | immed_8;
871 instr |= x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
875 instr |= x.rs_.code()*B8 | x.shift_op_ | B4 | x.rm_.code();
877 emit(instr | rn.code()*B16 | rd.code()*B12);
885 void Assembler::addrmod2(Instr instr, Register rd, const MemOperand& x) {
886 ASSERT((instr & ~(kCondMask | B | L)) == B26);
898 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
899 mov(ip, Operand(x.offset_), LeaveCC, Instruction::ConditionField(instr));
900 addrmod2(instr, rd, MemOperand(x.rn_, ip, x.am_));
904 instr |= offset_12;
910 instr |= B25 | x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
913 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12);
917 void Assembler::addrmod3(Instr instr, Register rd, const MemOperand& x) {
918 ASSERT((instr & ~(kCondMask | L | S6 | H)) == (B4 | B7));
931 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
932 mov(ip, Operand(x.offset_), LeaveCC, Instruction::ConditionField(instr));
933 addrmod3(instr, rd, MemOperand(x.rn_, ip, x.am_));
937 instr |= B | (offset_8 >> 4)*B8 | (offset_8 & 0xf);
941 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
943 Instruction::ConditionField(instr));
944 addrmod3(instr, rd, MemOperand(x.rn_, ip, x.am_));
949 instr |= x.rm_.code();
952 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12);
956 void Assembler::addrmod4(Instr instr, Register rn, RegList rl) {
957 ASSERT((instr & ~(kCondMask | P | U | W | L)) == B27);
960 emit(instr | rn.code()*B16 | rl);
964 void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) {
967 (instr & ~(kCondMask | kCoprocessorMask | P | U | N | W | L)));
985 emit(instr | am | x.rn_.code()*B16 | crd.code()*B12 | offset_8);
1377 Instr instr;
1390 instr = I | rotate_imm*B8 | immed_8;
1393 instr = src.rm_.code();
1395 emit(cond | instr | B24 | B21 | fields | 15*B12);
1509 emit(reinterpret_cast<Instr>(msg));
2151 static Instr EncodeVCVT(const VFPType dst_type,
2401 bool Assembler::IsNop(Instr instr, int type) {
2404 return instr == (al | 13*B21 | type*B12 | type);
2632 Instr instr = instr_at(rinfo.pc());
2634 ASSERT(IsLdrPcImmediateOffset(instr) &&
2635 GetLdrRegisterImmediateOffset(instr) == 0);
2644 instr_at_put(rinfo.pc(), SetLdrRegisterImmediateOffset(instr, delta));
