Lines Matching refs:Binop
1192 switch (e->Iex.Binop.op) {
1210 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1216 e->Iex.Binop.arg2);
1220 e->Iex.Binop.arg2);
1230 switch (e->Iex.Binop.op) {
1243 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1249 ri_srcR = iselWordExpr_RH5u(env, e->Iex.Binop.arg2);
1251 ri_srcR = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
1286 if (e->Iex.Binop.op == Iop_DivS32 ||
1287 e->Iex.Binop.op == Iop_DivU32 ||
1288 e->Iex.Binop.op == Iop_DivS32E ||
1289 e->Iex.Binop.op == Iop_DivU32E) {
1290 Bool syned = toBool((e->Iex.Binop.op == Iop_DivS32) || (e->Iex.Binop.op == Iop_DivS32E));
1292 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1293 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1295 PPCInstr_Div( ( ( e->Iex.Binop.op == Iop_DivU32E )
1296 || ( e->Iex.Binop.op == Iop_DivS32E ) ) ? True
1305 if (e->Iex.Binop.op == Iop_DivS64 ||
1306 e->Iex.Binop.op == Iop_DivU64 || e->Iex.Binop.op == Iop_DivS64E
1307 || e->Iex.Binop.op == Iop_DivU64E ) {
1308 Bool syned = toBool((e->Iex.Binop.op == Iop_DivS64) ||(e->Iex.Binop.op == Iop_DivS64E));
1310 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1311 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1314 PPCInstr_Div( ( ( e->Iex.Binop.op == Iop_DivS64E )
1315 || ( e->Iex.Binop.op
1327 if (e->Iex.Binop.op == Iop_Mul32
1328 || e->Iex.Binop.op == Iop_Mul64) {
1330 Bool sz32 = (e->Iex.Binop.op != Iop_Mul64);
1332 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1333 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1341 && (e->Iex.Binop.op == Iop_MullU32
1342 || e->Iex.Binop.op == Iop_MullS32)) {
1346 Bool syned = toBool(e->Iex.Binop.op == Iop_MullS32);
1347 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1348 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1363 if (e->Iex.Binop.op == Iop_CmpORD32S
1364 || e->Iex.Binop.op == Iop_CmpORD32U) {
1365 Bool syned = toBool(e->Iex.Binop.op == Iop_CmpORD32S);
1367 HReg srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1368 PPCRH* srcR = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
1377 if (e->Iex.Binop.op == Iop_CmpORD64S
1378 || e->Iex.Binop.op == Iop_CmpORD64U) {
1379 Bool syned = toBool(e->Iex.Binop.op == Iop_CmpORD64S);
1381 HReg srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1382 PPCRH* srcR = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
1392 if (e->Iex.Binop.op == Iop_Max32U) {
1393 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
1394 HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
1404 if (e->Iex.Binop.op == Iop_32HLto64) {
1405 HReg r_Hi = iselWordExpr_R(env, e->Iex.Binop.arg1);
1406 HReg r_Lo = iselWordExpr_R(env, e->Iex.Binop.arg2);
1421 if (e->Iex.Binop.op == Iop_CmpF64) {
1422 HReg fr_srcL = iselDblExpr(env, e->Iex.Binop.arg1);
1423 HReg fr_srcR = iselDblExpr(env, e->Iex.Binop.arg2);
1480 if ( e->Iex.Binop.op == Iop_F64toI32S ||
1481 e->Iex.Binop.op == Iop_F64toI32U ) {
1485 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
1490 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
1494 e->Iex.Binop.op == Iop_F64toI32S ? True/*syned*/
1512 if (e->Iex.Binop.op == Iop_F64toI64S || e->Iex.Binop.op == Iop_F64toI64U ) {
1516 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
1521 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
1525 ( e->Iex.Binop.op == Iop_F64toI64S ) ? True
2077 && e->Iex.Binop.op == Iop_Add64
2078 && e->Iex.Binop.arg2->tag == Iex_Const
2079 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64
2080 && (aligned4imm ? uLong_is_4_aligned(e->Iex.Binop.arg2
2083 && uLong_fits_in_16_bits(e->Iex.Binop.arg2
2085 return PPCAMode_IR( (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U64,
2086 iselWordExpr_R(env, e->Iex.Binop.arg1) );
2091 && e->Iex.Binop.op == Iop_Add64) {
2092 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
2093 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
2103 && e->Iex.Binop.op == Iop_Add32
2104 && e->Iex.Binop.arg2->tag == Iex_Const
2105 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U32
2106 && uInt_fits_in_16_bits(e->Iex.Binop.arg2
2108 return PPCAMode_IR( (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U32,
2109 iselWordExpr_R(env, e->Iex.Binop.arg1) );
2114 && e->Iex.Binop.op == Iop_Add32) {
2115 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
2116 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
2414 && (e->Iex.Binop.op == Iop_CmpEQ32
2415 || e->Iex.Binop.op == Iop_CmpNE32
2416 || e->Iex.Binop.op == Iop_CmpLT32S
2417 || e->Iex.Binop.op == Iop_CmpLT32U
2418 || e->Iex.Binop.op == Iop_CmpLE32S
2419 || e->Iex.Binop.op == Iop_CmpLE32U)) {
2420 Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S ||
2421 e->Iex.Binop.op == Iop_CmpLE32S);
2422 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
2423 PPCRH* ri2 = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
2427 switch (e->Iex.Binop.op) {
2452 HReg r_src = iselWordExpr_R(env, e->Iex.Binop.arg1);
2463 && (e->Iex.Binop.op == Iop_CmpEQ64
2464 || e->Iex.Binop.op == Iop_CmpNE64
2465 || e->Iex.Binop.op == Iop_CmpLT64S
2466 || e->Iex.Binop.op == Iop_CmpLT64U
2467 || e->Iex.Binop.op == Iop_CmpLE64S
2468 || e->Iex.Binop.op == Iop_CmpLE64U)) {
2469 Bool syned = (e->Iex.Binop.op == Iop_CmpLT64S ||
2470 e->Iex.Binop.op == Iop_CmpLE64S);
2471 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
2472 PPCRH* ri2 = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
2477 switch (e->Iex.Binop.op) {
2544 switch (e->Iex.Binop.op) {
2550 Bool syned = toBool(e->Iex.Binop.op == Iop_MullS64);
2551 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2552 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2566 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2567 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2702 IROp op_binop = e->Iex.Binop.op;
2710 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2711 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2732 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2733 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2746 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2747 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2759 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2760 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2770 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
2775 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3056 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_I64UtoF32) {
3059 HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
3064 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3087 iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2);
3090 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3262 switch (e->Iex.Binop.op) {
3268 HReg fr_src = iselDblExpr(env, e->Iex.Binop.arg2);
3269 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3277 if (e->Iex.Binop.op == Iop_RoundF64toF32) {
3279 HReg r_src = iselDblExpr(env, e->Iex.Binop.arg2);
3280 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3286 if (e->Iex.Binop.op == Iop_I64StoF64 || e->Iex.Binop.op == Iop_I64UtoF64) {
3289 HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
3294 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3301 e->Iex.Binop.op == Iop_I64StoF64,
3318 iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2);
3321 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3329 e->Iex.Binop.op == Iop_I64StoF64,
3578 return mk_AvDuplicateRI(env, e->Iex.Binop.arg1);
3586 switch (e->Iex.Binop.op) {
3604 iselInt64Expr(&r1, &r0, env, e->Iex.Binop.arg2);
3608 iselInt64Expr(&r3, &r2, env, e->Iex.Binop.arg1);
3618 HReg rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
3619 HReg rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
3653 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3654 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3661 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3662 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3686 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
3687 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
3717 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
3718 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
3751 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
3752 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
3783 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
3784 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
3793 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
3795 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
3804 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
3806 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
3815 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
3817 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
3826 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
3827 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
3835 HReg v_src = iselVecExpr(env, e->Iex.Binop.arg1);
3836 HReg v_ctl = iselVecExpr(env, e->Iex.Binop.arg2);
3843 } /* switch (e->Iex.Binop.op) */
