Lines Matching defs:RegisterID
57 } RegisterID;
420 typedef ARMRegisters::RegisterID RegisterID;
538 bool BadReg(RegisterID reg)
745 void add(RegisterID rd, RegisterID rn, ARMThumbImmediate imm)
763 m_formatter.oneWordOp7Reg3Reg3Reg3(OP_ADD_imm_T1, (RegisterID)imm.getUInt3(), rn, rd);
779 void add(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift)
789 void add(RegisterID rd, RegisterID rn, RegisterID rm)
802 void add_S(RegisterID rd, RegisterID rn, ARMThumbImmediate imm)
812 m_formatter.oneWordOp7Reg3Reg3Reg3(OP_ADD_imm_T1, (RegisterID)imm.getUInt3(), rn, rd);
824 void add_S(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift)
834 void add_S(RegisterID rd, RegisterID rn, RegisterID rm)
842 void ARM_and(RegisterID rd, RegisterID rn, ARMThumbImmediate imm)
850 void ARM_and(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift)
858 void ARM_and(RegisterID rd, RegisterID rn, RegisterID rm)
868 void asr(RegisterID rd, RegisterID rm, int32_t shiftAmount)
876 void asr(RegisterID rd, RegisterID rn, RegisterID rm)
892 JmpSrc blx(RegisterID rm, JumpType type)
895 m_formatter.oneWordOp8RegReg143(OP_BLX, rm, (RegisterID)8);
900 JmpSrc bx(RegisterID rm, JumpType type, Condition condition)
902 m_formatter.oneWordOp8RegReg143(OP_BX, rm, (RegisterID)0);
906 JmpSrc bx(RegisterID rm, JumpType type)
908 m_formatter.oneWordOp8RegReg143(OP_BX, rm, (RegisterID)0);
917 void clz(RegisterID rd, RegisterID rm)
924 void cmn(RegisterID rn, ARMThumbImmediate imm)
929 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_CMN_imm, rn, (RegisterID)0xf, imm);
932 void cmp(RegisterID rn, ARMThumbImmediate imm)
940 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_CMP_imm_T2, rn, (RegisterID)0xf, imm);
943 void cmp(RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift)
950 void cmp(RegisterID rn, RegisterID rm)
959 void eor(RegisterID rd, RegisterID rn, ARMThumbImmediate imm)
968 void eor(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift)
977 void eor(RegisterID rd, RegisterID rn, RegisterID rm)
1008 void ldr(RegisterID rt, RegisterID rn, ARMThumbImmediate imm)
1032 void ldr(RegisterID rt, RegisterID rn, int offset, bool index, bool wback)
1055 void ldr(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift=0)
1068 void ldrh(RegisterID rt, RegisterID rn, ARMThumbImmediate imm)
1090 void ldrh(RegisterID rt, RegisterID rn, int offset, bool index, bool wback)
1112 void ldrh(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift=0)
1125 void ldrb(RegisterID rt, RegisterID rn, ARMThumbImmediate imm)
1136 void ldrb(RegisterID rt, RegisterID rn, int offset, bool index, bool wback)
1159 void ldrb(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift = 0)
1171 void lsl(RegisterID rd, RegisterID rm, int32_t shiftAmount)
1179 void lsl(RegisterID rd, RegisterID rn, RegisterID rm)
1187 void lsr(RegisterID rd, RegisterID rm, int32_t shiftAmount)
1195 void lsr(RegisterID rd, RegisterID rn, RegisterID rm)
1203 void movT3(RegisterID rd, ARMThumbImmediate imm)
1212 void mov(RegisterID rd, ARMThumbImmediate imm)
1225 void mov(RegisterID rd, RegisterID rm)
1230 void movt(RegisterID rd, ARMThumbImmediate imm)
1237 void mvn(RegisterID rd, ARMThumbImmediate imm)
1245 void mvn(RegisterID rd, RegisterID rm, ShiftTypeAndAmount shift)
1252 void mvn(RegisterID rd, RegisterID rm)
1260 void neg(RegisterID rd, RegisterID rm)
1266 void orr(RegisterID rd, RegisterID rn, ARMThumbImmediate imm)
1274 void orr(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift)
1282 void orr(RegisterID rd, RegisterID rn, RegisterID rm)
1292 void orr_S(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift)
1300 void orr_S(RegisterID rd, RegisterID rn, RegisterID rm)
1310 void ror(RegisterID rd, RegisterID rm, int32_t shiftAmount)
1318 void ror(RegisterID rd, RegisterID rn, RegisterID rm)
1326 void smull(RegisterID rdLo, RegisterID rdHi, RegisterID rn, RegisterID rm)
1337 void str(RegisterID rt, RegisterID rn, ARMThumbImmediate imm)
1362 void str(RegisterID rt, RegisterID rn, int offset, bool index, bool wback)
1385 void str(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift=0)
1397 void sub(RegisterID rd, RegisterID rn, ARMThumbImmediate imm)
1410 m_formatter.oneWordOp7Reg3Reg3Reg3(OP_SUB_imm_T1, (RegisterID)imm.getUInt3(), rn, rd);
1426 void sub(RegisterID rd, ARMThumbImmediate imm, RegisterID rn)
1439 void sub(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift)
1449 void sub(RegisterID rd, RegisterID rn, RegisterID rm)
1458 void sub_S(RegisterID rd, RegisterID rn, ARMThumbImmediate imm)
1471 m_formatter.oneWordOp7Reg3Reg3Reg3(OP_SUB_imm_T1, (RegisterID)imm.getUInt3(), rn, rd);
1483 void sub_S(RegisterID rd, RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift)
1493 void sub_S(RegisterID rd, RegisterID rn, RegisterID rm)
1501 void tst(RegisterID rn, ARMThumbImmediate imm)
1506 m_formatter.twoWordOp5i6Imm4Reg4EncodedImm(OP_TST_imm, rn, (RegisterID)0xf, imm);
1509 void tst(RegisterID rn, RegisterID rm, ShiftTypeAndAmount shift)
1516 void tst(RegisterID rn, RegisterID rm)
1556 void vldr(FPDoubleRegisterID rd, RegisterID rn, int32_t imm)
1561 void vmov(RegisterID rd, FPSingleRegisterID rn)
1567 void vmov(FPSingleRegisterID rd, RegisterID rn)
1573 void vmrs(RegisterID reg = ARMRegisters::pc)
1584 void vstr(FPDoubleRegisterID rd, RegisterID rn, int32_t imm)
1871 VFPOperand(RegisterID reg)
2191 void oneWordOp5Reg3Imm8(OpcodeID op, RegisterID rd, uint8_t imm)
2196 void oneWordOp5Imm5Reg3Reg3(OpcodeID op, uint8_t imm, RegisterID reg1, RegisterID reg2)
2201 void oneWordOp7Reg3Reg3Reg3(OpcodeID op, RegisterID reg1, RegisterID reg2, RegisterID reg3)
2211 void oneWordOp8RegReg143(OpcodeID op, RegisterID reg1, RegisterID reg2)
2220 void oneWordOp10Reg3Reg3(OpcodeID op, RegisterID reg1, RegisterID reg2)
2225 void twoWordOp12Reg4FourFours(OpcodeID1 op, RegisterID reg, FourFours ff)
2243 void twoWordOp5i6Imm4Reg4EncodedImm(OpcodeID1 op, int imm4, RegisterID rd, ARMThumbImmediate imm)
2252 void twoWordOp12Reg4Reg4Imm12(OpcodeID1 op, RegisterID reg1, RegisterID reg2, uint16_t imm)
2272 void vfpMemOp(OpcodeID1 op1, OpcodeID2 op2, bool size, RegisterID rn, VFPOperand rd, int32_t imm)
