Lines Matching full:generate
51 .\" If the F register is turned on, we'll generate index entries on stderr for
223 [\fB\-\-print\-opcodes\fR] [\fB\-\-generate\-example\fR]
442 Generate debugging information for each assembler source line using whichever
447 Generate stabs debugging information for each assembler line. This
451 Generate stabs debugging information for each assembler line, with \s-1GNU\s0
458 Generate \s-1DWARF2\s0 debugging information for each assembler line. This
556 Generate an object file even after errors.
705 Generate position-independent (or position\-dependent) code. The
733 Generate \*(L"big endian\*(R" format output.
736 Generate \*(L"little endian\*(R" format output.
775 .IP "\fB\-\-generate\-example\fR" 4
776 .IX Item "--generate-example"
826 Generate \*(L"big endian\*(R" format output.
829 Generate \*(L"little endian\*(R" format output.
850 Generate code for a particular \s-1MIPS\s0 Instruction Set Architecture level.
862 Generate code for a particular \s-1MIPS\s0 cpu.
905 Generate code for the \s-1MIPS\s0 16 processor. This is equivalent to putting
923 Generate code for the \s-1MIPS\-3D\s0 Application Specific Extension.
932 Generate code for the \s-1MDMX\s0 Application Specific Extension.
941 Generate code for the \s-1DSP\s0 Release 1 Application Specific Extension.
950 Generate code for the \s-1DSP\s0 Release 2 Application Specific Extension.
960 Generate code for the \s-1MT\s0 Application Specific Extension.
978 between \s-1ELF\s0 and \s-1ECOFF\s0 only), handling of pseudo-opcodes which may generate
