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    Searched defs:DestReg (Results 1 - 10 of 10) sorted by null

  /external/llvm/lib/Target/Hexagon/
HexagonSplitTFRCondSets.cpp 87 int DestReg = MI->getOperand(0).getReg();
93 if (DestReg != SrcReg1) {
95 DestReg).addReg(MI->getOperand(1).getReg()).addReg(SrcReg1);
97 if (DestReg != SrcReg2) {
99 DestReg).addReg(MI->getOperand(1).getReg()).addReg(SrcReg2);
104 int DestReg = MI->getOperand(0).getReg();
109 DestReg).addReg(SrcReg1).addImm(Immed1);
111 DestReg).addReg(SrcReg1).addImm(Immed2);
  /external/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 99 unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
100 if (TargetRegisterInfo::isVirtualRegister(DestReg)) {
101 VRBase = DestReg;
103 } else if (DestReg != SrcReg)
140 // Figure out the register class to create for the destreg.
441 unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
442 if (TargetRegisterInfo::isVirtualRegister(DestReg)) {
443 VRBase = DestReg;
478 // Create the destreg if it is missing.
493 // Figure out the register class to create for the destreg. It should b
    [all...]
FunctionLoweringInfo.cpp 281 unsigned DestReg = ValueMap[PN];
282 if (!TargetRegisterInfo::isVirtualRegister(DestReg))
284 LiveOutRegInfo.grow(DestReg);
285 LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
SelectionDAGISel.cpp 530 unsigned DestReg = cast<RegisterSDNode>(N->getOperand(1))->getReg();
531 if (!TargetRegisterInfo::isVirtualRegister(DestReg))
542 FuncInfo->AddLiveOutRegInfo(DestReg, NumSignBits, KnownZero, KnownOne);
    [all...]
  /external/llvm/lib/CodeGen/
PHIElimination.cpp 202 unsigned DestReg = MPhi->getOperand(0).getReg();
219 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg);
231 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
235 TII->get(TargetOpcode::COPY), DestReg)
274 LV->addVirtualRegisterDead(DestReg, PHICopy);
275 LV->removeVirtualRegisterDead(DestReg, MPhi);
StrongPHIElimination.cpp 243 unsigned DestReg = BBI->getOperand(0).getReg();
244 addReg(DestReg);
251 unionRegs(DestReg, SrcReg);
287 unsigned DestReg = BBI->getOperand(0).getReg();
288 addReg(DestReg);
293 unionRegs(DestReg, SrcReg);
317 unsigned DestReg = PHI->getOperand(0).getReg();
318 if (!InsertedDestCopies.count(DestReg))
319 MergeLIsAndRename(DestReg, NewReg);
340 unsigned DestReg = I->first
    [all...]
  /external/llvm/lib/Target/PowerPC/
PPCRegisterInfo.cpp 421 MachineInstr &MI = *II; // ; <DestReg> = RESTORE_CR <offset>
435 unsigned DestReg = MI.getOperand(0).getReg();
436 assert(MI.definesRegister(DestReg) &&
444 if (DestReg != PPC::CR0) {
445 unsigned ShiftBits = getPPCRegisterNumbering(DestReg)*4;
452 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MTCRF8 : PPC::MTCRF), DestReg)
  /external/llvm/lib/Target/Mips/
MipsISelDAGToDAG.cpp 519 unsigned RdhwrOpc, SrcReg, DestReg;
524 DestReg = Mips::V1;
528 DestReg = Mips::V1_64;
535 SDValue Chain = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, DestReg,
537 SDValue ResNode = CurDAG->getCopyFromReg(Chain, dl, DestReg, PtrVT);
  /external/llvm/lib/Target/ARM/
ARMFastISel.cpp 525 unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));
527 DestReg)
529 return DestReg;
542 unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));
547 DestReg)
550 return DestReg;
589 unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));
601 TII.get(ARM::t2LDRpci), DestReg)
606 TII.get(ARM::LDRcp), DestReg)
610 return DestReg;
    [all...]
  /external/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]

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