| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypesGeneric.cpp | 97 EVT NVT = EVT::getVectorVT(*DAG.getContext(), NOutVT, 2);
99 if (isTypeLegal(NVT)) {
100 SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp);
207 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
215 assert(NVT.isByteSized() && "Expanded type not byte sized!");
217 Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(),
221 unsigned IncrementSize = NVT.getSizeInBits() / 8;
224 Hi = DAG.getLoad(NVT, dl, Chain, Ptr,
245 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT);
251 Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align)
[all...] |
| LegalizeVectorOps.cpp | 280 EVT NVT = TLI.getTypeToPromoteTo(Op.getOpcode(), VT);
286 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j));
291 Op = DAG.getNode(Op.getOpcode(), dl, NVT, &Operands[0], Operands.size());
|
| LegalizeTypes.cpp | [all...] |
| LegalizeDAG.cpp | 86 SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, DebugLoc dl,
178 SelectionDAGLegalize::ShuffleWithNarrowerEltType(EVT NVT, EVT VT, DebugLoc dl,
182 unsigned NumDestElts = NVT.getVectorNumElements();
188 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]);
201 assert(TLI.isShuffleMaskLegal(NewMask, NVT) && "Shuffle not legal?");
202 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]);
[all...] |
| LegalizeFloatTypes.cpp | 140 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
141 unsigned Size = NVT.getSizeInBits();
146 SDValue Mask = DAG.getConstant(API, NVT);
148 return DAG.getNode(ISD::AND, N->getDebugLoc(), NVT, Op, Mask);
152 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
160 NVT, Ops, 2, false, N->getDebugLoc());
164 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
171 NVT, &Op, 1, false, N->getDebugLoc());
217 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
224 NVT, &Op, 1, false, N->getDebugLoc())
[all...] |
| TargetLowering.cpp | 843 for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
844 EVT SVT = (MVT::SimpleValueType)nVT;
[all...] |
| LegalizeIntegerTypes.cpp | 266 EVT NVT = Op.getValueType();
269 unsigned DiffBits = NVT.getSizeInBits() - OVT.getSizeInBits();
270 return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op),
314 EVT NVT = Op.getValueType();
315 Op = DAG.getNode(N->getOpcode(), dl, NVT, Op);
317 return DAG.getNode(ISD::SUB, dl, NVT, Op,
318 DAG.getConstant(NVT.getSizeInBits() -
319 OVT.getSizeInBits(), NVT));
331 EVT NVT = Op.getValueType()
[all...] |
| LegalizeVectorTypes.cpp | 311 EVT NVT = N->getValueType(0).getVectorElementType();
321 return DAG.getNode(ExtendCode, DL, NVT, Res);
[all...] |
| SelectionDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 191 SDNode *SelectAtomicLoadAdd(SDNode *Node, EVT NVT);
192 SDNode *SelectAtomicLoadArith(SDNode *Node, EVT NVT);
[all...] |
| X86ISelLowering.cpp | [all...] |
