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      1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file defines wrappers for the Target class and related global
     11 // functionality.  This makes it easier to access the data and provides a single
     12 // place that needs to check it for validity.  All of these classes throw
     13 // exceptions on error conditions.
     14 //
     15 //===----------------------------------------------------------------------===//
     16 
     17 #ifndef CODEGEN_TARGET_H
     18 #define CODEGEN_TARGET_H
     19 
     20 #include "CodeGenRegisters.h"
     21 #include "CodeGenInstruction.h"
     22 #include "llvm/TableGen/Record.h"
     23 #include "llvm/Support/raw_ostream.h"
     24 #include <algorithm>
     25 
     26 namespace llvm {
     27 
     28 struct CodeGenRegister;
     29 class CodeGenTarget;
     30 
     31 // SelectionDAG node properties.
     32 //  SDNPMemOperand: indicates that a node touches memory and therefore must
     33 //                  have an associated memory operand that describes the access.
     34 enum SDNP {
     35   SDNPCommutative,
     36   SDNPAssociative,
     37   SDNPHasChain,
     38   SDNPOutGlue,
     39   SDNPInGlue,
     40   SDNPOptInGlue,
     41   SDNPMayLoad,
     42   SDNPMayStore,
     43   SDNPSideEffect,
     44   SDNPMemOperand,
     45   SDNPVariadic,
     46   SDNPWantRoot,
     47   SDNPWantParent
     48 };
     49 
     50 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
     51 /// record corresponds to.
     52 MVT::SimpleValueType getValueType(Record *Rec);
     53 
     54 std::string getName(MVT::SimpleValueType T);
     55 std::string getEnumName(MVT::SimpleValueType T);
     56 
     57 /// getQualifiedName - Return the name of the specified record, with a
     58 /// namespace qualifier if the record contains one.
     59 std::string getQualifiedName(const Record *R);
     60 
     61 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
     62 ///
     63 class CodeGenTarget {
     64   RecordKeeper &Records;
     65   Record *TargetRec;
     66 
     67   mutable DenseMap<const Record*, CodeGenInstruction*> Instructions;
     68   mutable CodeGenRegBank *RegBank;
     69   mutable std::vector<Record*> RegAltNameIndices;
     70   mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
     71   void ReadRegAltNameIndices() const;
     72   void ReadInstructions() const;
     73   void ReadLegalValueTypes() const;
     74 
     75   mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
     76 public:
     77   CodeGenTarget(RecordKeeper &Records);
     78 
     79   Record *getTargetRecord() const { return TargetRec; }
     80   const std::string &getName() const;
     81 
     82   /// getInstNamespace - Return the target-specific instruction namespace.
     83   ///
     84   std::string getInstNamespace() const;
     85 
     86   /// getInstructionSet - Return the InstructionSet object.
     87   ///
     88   Record *getInstructionSet() const;
     89 
     90   /// getAsmParser - Return the AssemblyParser definition for this target.
     91   ///
     92   Record *getAsmParser() const;
     93 
     94   /// getAsmParserVariant - Return the AssmblyParserVariant definition for
     95   /// this target.
     96   ///
     97   Record *getAsmParserVariant(unsigned i) const;
     98 
     99   /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
    100   /// available for this target.
    101   ///
    102   unsigned getAsmParserVariantCount() const;
    103 
    104   /// getAsmWriter - Return the AssemblyWriter definition for this target.
    105   ///
    106   Record *getAsmWriter() const;
    107 
    108   /// getRegBank - Return the register bank description.
    109   CodeGenRegBank &getRegBank() const;
    110 
    111   /// getRegisterByName - If there is a register with the specific AsmName,
    112   /// return it.
    113   const CodeGenRegister *getRegisterByName(StringRef Name) const;
    114 
    115   const std::vector<Record*> &getRegAltNameIndices() const {
    116     if (RegAltNameIndices.empty()) ReadRegAltNameIndices();
    117     return RegAltNameIndices;
    118   }
    119 
    120   const CodeGenRegisterClass &getRegisterClass(Record *R) const {
    121     return *getRegBank().getRegClass(R);
    122   }
    123 
    124   /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
    125   /// specified physical register.
    126   std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const;
    127 
    128   const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
    129     if (LegalValueTypes.empty()) ReadLegalValueTypes();
    130     return LegalValueTypes;
    131   }
    132 
    133   /// isLegalValueType - Return true if the specified value type is natively
    134   /// supported by the target (i.e. there are registers that directly hold it).
    135   bool isLegalValueType(MVT::SimpleValueType VT) const {
    136     const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
    137     for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
    138       if (LegalVTs[i] == VT) return true;
    139     return false;
    140   }
    141 
    142 private:
    143   DenseMap<const Record*, CodeGenInstruction*> &getInstructions() const {
    144     if (Instructions.empty()) ReadInstructions();
    145     return Instructions;
    146   }
    147 public:
    148 
    149   CodeGenInstruction &getInstruction(const Record *InstRec) const {
    150     if (Instructions.empty()) ReadInstructions();
    151     DenseMap<const Record*, CodeGenInstruction*>::iterator I =
    152       Instructions.find(InstRec);
    153     assert(I != Instructions.end() && "Not an instruction");
    154     return *I->second;
    155   }
    156 
    157   /// getInstructionsByEnumValue - Return all of the instructions defined by the
    158   /// target, ordered by their enum value.
    159   const std::vector<const CodeGenInstruction*> &
    160   getInstructionsByEnumValue() const {
    161     if (InstrsByEnum.empty()) ComputeInstrsByEnum();
    162     return InstrsByEnum;
    163   }
    164 
    165   typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
    166   inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
    167   inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
    168 
    169 
    170   /// isLittleEndianEncoding - are instruction bit patterns defined as  [0..n]?
    171   ///
    172   bool isLittleEndianEncoding() const;
    173 
    174 private:
    175   void ComputeInstrsByEnum() const;
    176 };
    177 
    178 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
    179 /// tablegen class in TargetSelectionDAG.td
    180 class ComplexPattern {
    181   MVT::SimpleValueType Ty;
    182   unsigned NumOperands;
    183   std::string SelectFunc;
    184   std::vector<Record*> RootNodes;
    185   unsigned Properties; // Node properties
    186 public:
    187   ComplexPattern() : NumOperands(0) {}
    188   ComplexPattern(Record *R);
    189 
    190   MVT::SimpleValueType getValueType() const { return Ty; }
    191   unsigned getNumOperands() const { return NumOperands; }
    192   const std::string &getSelectFunc() const { return SelectFunc; }
    193   const std::vector<Record*> &getRootNodes() const {
    194     return RootNodes;
    195   }
    196   bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
    197 };
    198 
    199 } // End llvm namespace
    200 
    201 #endif
    202