1 //===-- FastISel.h - Definition of the FastISel class ---------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines the FastISel class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_CODEGEN_FASTISEL_H 15 #define LLVM_CODEGEN_FASTISEL_H 16 17 #include "llvm/ADT/DenseMap.h" 18 #include "llvm/CodeGen/ValueTypes.h" 19 #include "llvm/CodeGen/MachineBasicBlock.h" 20 21 namespace llvm { 22 23 class AllocaInst; 24 class Constant; 25 class ConstantFP; 26 class FunctionLoweringInfo; 27 class Instruction; 28 class LoadInst; 29 class MachineBasicBlock; 30 class MachineConstantPool; 31 class MachineFunction; 32 class MachineInstr; 33 class MachineFrameInfo; 34 class MachineRegisterInfo; 35 class TargetData; 36 class TargetInstrInfo; 37 class TargetLowering; 38 class TargetMachine; 39 class TargetRegisterClass; 40 class TargetRegisterInfo; 41 class User; 42 class Value; 43 44 /// FastISel - This is a fast-path instruction selection class that 45 /// generates poor code and doesn't support illegal types or non-trivial 46 /// lowering, but runs quickly. 47 class FastISel { 48 protected: 49 DenseMap<const Value *, unsigned> LocalValueMap; 50 FunctionLoweringInfo &FuncInfo; 51 MachineRegisterInfo &MRI; 52 MachineFrameInfo &MFI; 53 MachineConstantPool &MCP; 54 DebugLoc DL; 55 const TargetMachine &TM; 56 const TargetData &TD; 57 const TargetInstrInfo &TII; 58 const TargetLowering &TLI; 59 const TargetRegisterInfo &TRI; 60 61 /// The position of the last instruction for materializing constants 62 /// for use in the current block. It resets to EmitStartPt when it 63 /// makes sense (for example, it's usually profitable to avoid function 64 /// calls between the definition and the use) 65 MachineInstr *LastLocalValue; 66 67 /// The top most instruction in the current block that is allowed for 68 /// emitting local variables. LastLocalValue resets to EmitStartPt when 69 /// it makes sense (for example, on function calls) 70 MachineInstr *EmitStartPt; 71 72 public: 73 /// getLastLocalValue - Return the position of the last instruction 74 /// emitted for materializing constants for use in the current block. 75 MachineInstr *getLastLocalValue() { return LastLocalValue; } 76 77 /// setLastLocalValue - Update the position of the last instruction 78 /// emitted for materializing constants for use in the current block. 79 void setLastLocalValue(MachineInstr *I) { 80 EmitStartPt = I; 81 LastLocalValue = I; 82 } 83 84 /// startNewBlock - Set the current block to which generated machine 85 /// instructions will be appended, and clear the local CSE map. 86 /// 87 void startNewBlock(); 88 89 /// getCurDebugLoc() - Return current debug location information. 90 DebugLoc getCurDebugLoc() const { return DL; } 91 92 /// SelectInstruction - Do "fast" instruction selection for the given 93 /// LLVM IR instruction, and append generated machine instructions to 94 /// the current block. Return true if selection was successful. 95 /// 96 bool SelectInstruction(const Instruction *I); 97 98 /// SelectOperator - Do "fast" instruction selection for the given 99 /// LLVM IR operator (Instruction or ConstantExpr), and append 100 /// generated machine instructions to the current block. Return true 101 /// if selection was successful. 102 /// 103 bool SelectOperator(const User *I, unsigned Opcode); 104 105 /// getRegForValue - Create a virtual register and arrange for it to 106 /// be assigned the value for the given LLVM value. 107 unsigned getRegForValue(const Value *V); 108 109 /// lookUpRegForValue - Look up the value to see if its value is already 110 /// cached in a register. It may be defined by instructions across blocks or 111 /// defined locally. 112 unsigned lookUpRegForValue(const Value *V); 113 114 /// getRegForGEPIndex - This is a wrapper around getRegForValue that also 115 /// takes care of truncating or sign-extending the given getelementptr 116 /// index value. 117 std::pair<unsigned, bool> getRegForGEPIndex(const Value *V); 118 119 /// TryToFoldLoad - The specified machine instr operand is a vreg, and that 120 /// vreg is being provided by the specified load instruction. If possible, 121 /// try to fold the load as an operand to the instruction, returning true if 122 /// possible. 123 virtual bool TryToFoldLoad(MachineInstr * /*MI*/, unsigned /*OpNo*/, 124 const LoadInst * /*LI*/) { 125 return false; 126 } 127 128 /// recomputeInsertPt - Reset InsertPt to prepare for inserting instructions 129 /// into the current block. 130 void recomputeInsertPt(); 131 132 struct SavePoint { 133 MachineBasicBlock::iterator InsertPt; 134 DebugLoc DL; 135 }; 136 137 /// enterLocalValueArea - Prepare InsertPt to begin inserting instructions 138 /// into the local value area and return the old insert position. 139 SavePoint enterLocalValueArea(); 140 141 /// leaveLocalValueArea - Reset InsertPt to the given old insert position. 142 void leaveLocalValueArea(SavePoint Old); 143 144 virtual ~FastISel(); 145 146 protected: 147 explicit FastISel(FunctionLoweringInfo &funcInfo); 148 149 /// TargetSelectInstruction - This method is called by target-independent 150 /// code when the normal FastISel process fails to select an instruction. 151 /// This gives targets a chance to emit code for anything that doesn't 152 /// fit into FastISel's framework. It returns true if it was successful. 153 /// 154 virtual bool 155 TargetSelectInstruction(const Instruction *I) = 0; 156 157 /// FastEmit_r - This method is called by target-independent code 158 /// to request that an instruction with the given type and opcode 159 /// be emitted. 160 virtual unsigned FastEmit_(MVT VT, 161 MVT RetVT, 162 unsigned Opcode); 163 164 /// FastEmit_r - This method is called by target-independent code 165 /// to request that an instruction with the given type, opcode, and 166 /// register operand be emitted. 167 /// 168 virtual unsigned FastEmit_r(MVT VT, 169 MVT RetVT, 170 unsigned Opcode, 171 unsigned Op0, bool Op0IsKill); 172 173 /// FastEmit_rr - This method is called by target-independent code 174 /// to request that an instruction with the given type, opcode, and 175 /// register operands be emitted. 176 /// 177 virtual unsigned FastEmit_rr(MVT VT, 178 MVT RetVT, 179 unsigned Opcode, 180 unsigned Op0, bool Op0IsKill, 181 unsigned Op1, bool Op1IsKill); 182 183 /// FastEmit_ri - This method is called by target-independent code 184 /// to request that an instruction with the given type, opcode, and 185 /// register and immediate operands be emitted. 186 /// 187 virtual unsigned FastEmit_ri(MVT VT, 188 MVT RetVT, 189 unsigned Opcode, 190 unsigned Op0, bool Op0IsKill, 191 uint64_t Imm); 192 193 /// FastEmit_rf - This method is called by target-independent code 194 /// to request that an instruction with the given type, opcode, and 195 /// register and floating-point immediate operands be emitted. 196 /// 197 virtual unsigned FastEmit_rf(MVT VT, 198 MVT RetVT, 199 unsigned Opcode, 200 unsigned Op0, bool Op0IsKill, 201 const ConstantFP *FPImm); 202 203 /// FastEmit_rri - This method is called by target-independent code 204 /// to request that an instruction with the given type, opcode, and 205 /// register and immediate operands be emitted. 206 /// 207 virtual unsigned FastEmit_rri(MVT VT, 208 MVT RetVT, 209 unsigned Opcode, 210 unsigned Op0, bool Op0IsKill, 211 unsigned Op1, bool Op1IsKill, 212 uint64_t Imm); 213 214 /// FastEmit_ri_ - This method is a wrapper of FastEmit_ri. It first tries 215 /// to emit an instruction with an immediate operand using FastEmit_ri. 216 /// If that fails, it materializes the immediate into a register and try 217 /// FastEmit_rr instead. 218 unsigned FastEmit_ri_(MVT VT, 219 unsigned Opcode, 220 unsigned Op0, bool Op0IsKill, 221 uint64_t Imm, MVT ImmType); 222 223 /// FastEmit_i - This method is called by target-independent code 224 /// to request that an instruction with the given type, opcode, and 225 /// immediate operand be emitted. 226 virtual unsigned FastEmit_i(MVT VT, 227 MVT RetVT, 228 unsigned Opcode, 229 uint64_t Imm); 230 231 /// FastEmit_f - This method is called by target-independent code 232 /// to request that an instruction with the given type, opcode, and 233 /// floating-point immediate operand be emitted. 234 virtual unsigned FastEmit_f(MVT VT, 235 MVT RetVT, 236 unsigned Opcode, 237 const ConstantFP *FPImm); 238 239 /// FastEmitInst_ - Emit a MachineInstr with no operands and a 240 /// result register in the given register class. 241 /// 242 unsigned FastEmitInst_(unsigned MachineInstOpcode, 243 const TargetRegisterClass *RC); 244 245 /// FastEmitInst_r - Emit a MachineInstr with one register operand 246 /// and a result register in the given register class. 247 /// 248 unsigned FastEmitInst_r(unsigned MachineInstOpcode, 249 const TargetRegisterClass *RC, 250 unsigned Op0, bool Op0IsKill); 251 252 /// FastEmitInst_rr - Emit a MachineInstr with two register operands 253 /// and a result register in the given register class. 254 /// 255 unsigned FastEmitInst_rr(unsigned MachineInstOpcode, 256 const TargetRegisterClass *RC, 257 unsigned Op0, bool Op0IsKill, 258 unsigned Op1, bool Op1IsKill); 259 260 /// FastEmitInst_rrr - Emit a MachineInstr with three register operands 261 /// and a result register in the given register class. 262 /// 263 unsigned FastEmitInst_rrr(unsigned MachineInstOpcode, 264 const TargetRegisterClass *RC, 265 unsigned Op0, bool Op0IsKill, 266 unsigned Op1, bool Op1IsKill, 267 unsigned Op2, bool Op2IsKill); 268 269 /// FastEmitInst_ri - Emit a MachineInstr with a register operand, 270 /// an immediate, and a result register in the given register class. 271 /// 272 unsigned FastEmitInst_ri(unsigned MachineInstOpcode, 273 const TargetRegisterClass *RC, 274 unsigned Op0, bool Op0IsKill, 275 uint64_t Imm); 276 277 /// FastEmitInst_rii - Emit a MachineInstr with one register operand 278 /// and two immediate operands. 279 /// 280 unsigned FastEmitInst_rii(unsigned MachineInstOpcode, 281 const TargetRegisterClass *RC, 282 unsigned Op0, bool Op0IsKill, 283 uint64_t Imm1, uint64_t Imm2); 284 285 /// FastEmitInst_rf - Emit a MachineInstr with two register operands 286 /// and a result register in the given register class. 287 /// 288 unsigned FastEmitInst_rf(unsigned MachineInstOpcode, 289 const TargetRegisterClass *RC, 290 unsigned Op0, bool Op0IsKill, 291 const ConstantFP *FPImm); 292 293 /// FastEmitInst_rri - Emit a MachineInstr with two register operands, 294 /// an immediate, and a result register in the given register class. 295 /// 296 unsigned FastEmitInst_rri(unsigned MachineInstOpcode, 297 const TargetRegisterClass *RC, 298 unsigned Op0, bool Op0IsKill, 299 unsigned Op1, bool Op1IsKill, 300 uint64_t Imm); 301 302 /// FastEmitInst_i - Emit a MachineInstr with a single immediate 303 /// operand, and a result register in the given register class. 304 unsigned FastEmitInst_i(unsigned MachineInstrOpcode, 305 const TargetRegisterClass *RC, 306 uint64_t Imm); 307 308 /// FastEmitInst_ii - Emit a MachineInstr with a two immediate operands. 309 unsigned FastEmitInst_ii(unsigned MachineInstrOpcode, 310 const TargetRegisterClass *RC, 311 uint64_t Imm1, uint64_t Imm2); 312 313 /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg 314 /// from a specified index of a superregister to a specified type. 315 unsigned FastEmitInst_extractsubreg(MVT RetVT, 316 unsigned Op0, bool Op0IsKill, 317 uint32_t Idx); 318 319 /// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op 320 /// with all but the least significant bit set to zero. 321 unsigned FastEmitZExtFromI1(MVT VT, 322 unsigned Op0, bool Op0IsKill); 323 324 /// FastEmitBranch - Emit an unconditional branch to the given block, 325 /// unless it is the immediate (fall-through) successor, and update 326 /// the CFG. 327 void FastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL); 328 329 void UpdateValueMap(const Value* I, unsigned Reg, unsigned NumRegs = 1); 330 331 unsigned createResultReg(const TargetRegisterClass *RC); 332 333 /// TargetMaterializeConstant - Emit a constant in a register using 334 /// target-specific logic, such as constant pool loads. 335 virtual unsigned TargetMaterializeConstant(const Constant* C) { 336 return 0; 337 } 338 339 /// TargetMaterializeAlloca - Emit an alloca address in a register using 340 /// target-specific logic. 341 virtual unsigned TargetMaterializeAlloca(const AllocaInst* C) { 342 return 0; 343 } 344 345 virtual unsigned TargetMaterializeFloatZero(const ConstantFP* CF) { 346 return 0; 347 } 348 349 private: 350 bool SelectBinaryOp(const User *I, unsigned ISDOpcode); 351 352 bool SelectFNeg(const User *I); 353 354 bool SelectGetElementPtr(const User *I); 355 356 bool SelectCall(const User *I); 357 358 bool SelectBitCast(const User *I); 359 360 bool SelectCast(const User *I, unsigned Opcode); 361 362 bool SelectExtractValue(const User *I); 363 364 bool SelectInsertValue(const User *I); 365 366 /// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks. 367 /// Emit code to ensure constants are copied into registers when needed. 368 /// Remember the virtual registers that need to be added to the Machine PHI 369 /// nodes as input. We cannot just directly add them, because expansion 370 /// might result in multiple MBB's for one BB. As such, the start of the 371 /// BB might correspond to a different MBB than the end. 372 bool HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB); 373 374 /// materializeRegForValue - Helper for getRegForVale. This function is 375 /// called when the value isn't already available in a register and must 376 /// be materialized with new instructions. 377 unsigned materializeRegForValue(const Value *V, MVT VT); 378 379 /// flushLocalValueMap - clears LocalValueMap and moves the area for the 380 /// new local variables to the beginning of the block. It helps to avoid 381 /// spilling cached variables across heavy instructions like calls. 382 void flushLocalValueMap(); 383 384 /// hasTrivialKill - Test whether the given value has exactly one use. 385 bool hasTrivialKill(const Value *V) const; 386 387 /// removeDeadCode - Remove all dead instructions between the I and E. 388 void removeDeadCode(MachineBasicBlock::iterator I, 389 MachineBasicBlock::iterator E); 390 }; 391 392 } 393 394 #endif 395
