| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 169 case ISD::MULHU:
174 unsigned Opcode = N->getOpcode() == ISD::MULHU ? SP::UMULrr : SP::SMULrr;
|
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 295 // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing
297 MULHU, MULHS,
[all...] |
| SelectionDAG.h | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelDAGToDAG.cpp | 446 case ISD::MULHU: {
448 MultOpc = (Opcode == ISD::MULHU ? Mips::MULTu : Mips::MULT);
450 MultOpc = (Opcode == ISD::MULHU ? Mips::DMULTu : Mips::DMULT);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 157 case ISD::MULHU: return "mulhu";
|
| LegalizeDAG.cpp | [all...] |
| TargetLowering.cpp | [all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| LegalizeVectorTypes.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 115 setOperationAction(ISD::MULHU, MVT::i32, Expand);
116 setOperationAction(ISD::MULHU, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 145 setOperationAction(ISD::MULHU, MVT::i8, Expand);
150 setOperationAction(ISD::MULHU, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 258 setOperationAction(ISD::MULHU, MVT::i8, Expand);
262 setOperationAction(ISD::MULHU, MVT::i16, Expand);
266 setOperationAction(ISD::MULHU, MVT::i32, Expand);
270 setOperationAction(ISD::MULHU, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/MBlaze/Disassembler/ |
| MBlazeDisassembler.cpp | 110 case 3: return MBlaze::MULHU;
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 102 setOperationAction(ISD::MULHU, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 598 setOperationAction(ISD::MULHU, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 352 setOperationAction(ISD::MULHU, VT, Expand);
[all...] |
