| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 643 /// MemIndexedMode enum - This enum defines the load / store indexed
670 enum MemIndexedMode {
[all...] |
| SelectionDAGNodes.h | 606 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
[all...] |
| SelectionDAG.h | 664 SDValue Offset, ISD::MemIndexedMode AM);
665 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
672 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
693 SDValue Offset, ISD::MemIndexedMode AM);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 137 ISD::MemIndexedMode &AM,
|
| HexagonISelDAGToDAG.cpp | 581 ISD::MemIndexedMode AM = LD->getAddressingMode();
720 ISD::MemIndexedMode AM = ST->getAddressingMode();
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| HexagonISelLowering.cpp | 626 ISD::MemIndexedMode &AM,
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| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 173 ISD::MemIndexedMode &AM,
|
| MSP430ISelDAGToDAG.cpp | 303 ISD::MemIndexedMode AM = LD->getAddressingMode();
|
| MSP430ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 306 ISD::MemIndexedMode &AM,
314 ISD::MemIndexedMode &AM,
|
| ARMISelDAGToDAG.cpp | 728 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
764 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
784 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
857 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 258 ISD::MemIndexedMode &AM,
|
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 315 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
|
| SelectionDAG.cpp | 488 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
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| DAGCombiner.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 749 ISD::MemIndexedMode &/*AM*/,
759 ISD::MemIndexedMode &/*AM*/
[all...] |
