| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 355 SmallVectorImpl<MachineInstr*> &NewMIs) const{
359 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW))
367 NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR), PPC::R11));
368 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STW))
375 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD))
383 NewMIs.push_back(BuildMI(MF, DL, get(PPC::MFLR8), PPC::X11));
384 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STD))
390 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFD))
395 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::STFS))
402 NewMIs.push_back(addFrameReference(BuildMI(MF, DL, get(PPC::SPILL_CR)
[all...] |
| PPCInstrInfo.h | 74 SmallVectorImpl<MachineInstr*> &NewMIs) const;
78 SmallVectorImpl<MachineInstr*> &NewMIs) const;
|
| /external/llvm/lib/CodeGen/ |
| TwoAddressInstructionPass.cpp | [all...] |
| MachineLICM.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 83 SmallVectorImpl<MachineInstr*> &NewMIs) const;
94 SmallVectorImpl<MachineInstr*> &NewMIs) const;
|
| HexagonInstrInfo.cpp | 396 SmallVectorImpl<MachineInstr*> &NewMIs) const
437 SmallVectorImpl<MachineInstr*> &NewMIs) const {
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 236 SmallVectorImpl<MachineInstr*> &NewMIs) const;
249 SmallVectorImpl<MachineInstr*> &NewMIs) const;
288 SmallVectorImpl<MachineInstr*> &NewMIs) const;
|
| X86InstrInfo.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 482 SmallVectorImpl<MachineInstr*> &NewMIs) const{
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 204 std::vector<MachineInstr*> NewMIs;
214 NewMIs.push_back(MemMI);
215 NewMIs.push_back(UpdateMI);
227 NewMIs.push_back(UpdateMI);
228 NewMIs.push_back(MemMI);
247 MachineInstr *NewMI = NewMIs[j];
260 MFI->insert(MBBI, NewMIs[1]);
261 MFI->insert(MBBI, NewMIs[0]);
262 return NewMIs[0];
[all...] |
