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  /external/dropbear/libtomcrypt/src/encauth/gcm/
gcm_mult_h.c 30 asm("movdqa (%0),%%xmm0"::"r"(&gcm->PC[0][I[0]][0]));
32 asm("pxor (%0),%%xmm0"::"r"(&gcm->PC[x][I[x]][0]));
36 XMEMCPY(T, &gcm->PC[0][I[0]][0], 16);
40 *((LTC_FAST_TYPE *)(T + y)) ^= *((LTC_FAST_TYPE *)(&gcm->PC[x][I[x]][y]));
44 T[y] ^= gcm->PC[x][I[x]][y];
gcm_init.c 82 gcm_gf_mult(gcm->H, B, &gcm->PC[0][y][0]);
89 t = gcm->PC[x-1][y][15];
91 gcm->PC[x][y][z] = gcm->PC[x-1][y][z-1];
93 gcm->PC[x][y][0] = gcm_shift_table[t<<1];
94 gcm->PC[x][y][1] ^= gcm_shift_table[(t<<1)+1];
  /external/dropbear/libtomcrypt/src/modes/lrw/
lrw_start.c 78 gcm_gf_mult(tweak, B, &lrw->PC[0][y][0]);
85 t = lrw->PC[x-1][y][15];
87 lrw->PC[x][y][z] = lrw->PC[x-1][y][z-1];
89 lrw->PC[x][y][0] = gcm_shift_table[t<<1];
90 lrw->PC[x][y][1] ^= gcm_shift_table[(t<<1)+1];
lrw_setiv.c 55 XMEMCPY(T, &lrw->PC[0][IV[0]][0], 16);
59 *((LTC_FAST_TYPE *)(T + y)) ^= *((LTC_FAST_TYPE *)(&lrw->PC[x][IV[x]][y]));
63 T[y] ^= lrw->PC[x][IV[x]][y];
lrw_process.c 63 *((LTC_FAST_TYPE *)(lrw->pad + y)) ^= *((LTC_FAST_TYPE *)(&lrw->PC[x][lrw->IV[x]][y])) ^ *((LTC_FAST_TYPE *)(&lrw->PC[x][(lrw->IV[x]-1)&255][y]));
67 lrw->pad[y] ^= lrw->PC[x][lrw->IV[x]][y] ^ lrw->PC[x][(lrw->IV[x]-1)&255][y];
  /dalvik/vm/compiler/template/armv5te/
TEMPLATE_INTERPRET.S 6 * translation chain, it will point to the chaining Dalvik PC -3.
9 * r1 - the Dalvik PC to begin interpretation.
11 * [lr, #3] contains Dalvik PC to begin interpretation
25 mov r0, r1 @ set Dalvik PC
  /dalvik/vm/mterp/armv5te/
OP_THROW_VERIFICATION_ERROR.S 10 EXPORT_PC() @ export the PC
OP_FILL_ARRAY_DATA.S 8 add r1, rPC, r1, lsl #1 @ r1<- PC + BBBBbbbb*2 (array data off.)
OP_MONITOR_EXIT.S 13 EXPORT_PC() @ before fetch: export the PC
  /external/llvm/include/llvm-c/
Disassembler.h 39 * is at the PC parameter. For some instruction sets, there can be more than
50 typedef int (*LLVMOpInfoCallback)(void *DisInfo, uint64_t PC,
64 * including any PC adjustment, is passed in to the call back in the Value
100 * disassembler for things like adding a comment for a PC plus a constant
105 * instruction is passed indirectly as is the PC of the instruction in
123 /* The input reference is from a PC relative load instruction. */
157 * instruction is at the address specified by the PC parameter. If a valid
164 uint64_t BytesSize, uint64_t PC,
  /bionic/libc/kernel/arch-mips/asm/
ptrace.h 22 #define PC 64
  /development/ndk/platforms/android-9/arch-mips/include/asm/
ptrace.h 22 #define PC 64
  /external/quake/quake/src/QW/
qwcl.x11.spec.sh 26 conceived" - PC GAMER
28 "The most important PC game ever" - PC ZONE
glqwcl.spec.sh 26 conceived" - PC GAMER
28 "The most important PC game ever" - PC ZONE
  /prebuilts/gcc/darwin-x86/mips/mipsel-linux-android-4.4.3/sysroot/usr/include/asm/
ptrace.h 22 #define PC 64
  /prebuilts/gcc/linux-x86/mips/mipsel-linux-android-4.4.3/sysroot/usr/include/asm/
ptrace.h 22 #define PC 64
  /dalvik/vm/mterp/x86-atom/
OP_PACKED_SWITCH.S 41 lea (rPC, %ecx, 2), %ecx # %ecx<- PC + +BBBBBBBB*2
42 movl %ecx, -8(%esp) # push parameter PC + +BBBBBBBB*2
OP_FILL_ARRAY_DATA.S 36 lea (rPC, %edx, 2), %edx # %edx<- PC + +BBBBBBBB; array data location
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/
termcap.h 57 extern NCURSES_EXPORT_VAR(char) PC;
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/
termcap.h 57 extern NCURSES_EXPORT_VAR(char) PC;
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/
termcap.h 57 extern NCURSES_EXPORT_VAR(char) PC;
  /dalvik/vm/mterp/x86/
OP_FILL_ARRAY_DATA.S 4 leal (rPC,%ecx,2),%ecx # ecx<- PC + BBBBbbbb*2
OP_PACKED_SWITCH.S 15 leal (rPC,%ecx,2),%ecx # ecx<- PC + BBBBbbbb*2
OP_MUL_LONG.S 15 SPILL_TMP2(%esi) # save Dalvik PC
31 UNSPILL_TMP2(%esi) # Restore Dalvik PC
  /external/blktrace/
act_mask.c 25 DECLARE_MASK_MAP(PC),

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