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    Searched refs:Prefetch (Results 1 - 11 of 11) sorted by null

  /external/oprofile/events/mips/sb1/
events 50 event:0x6 counters:1,2,3 um:zero minimum:500 name:LD_ST_HITS_PREFETCH_IN_QUEUE :Load/store hits prefetch in read queue
51 event:0x5 counters:1,2,3 um:zero minimum:500 name:PREFETCH_HITS_CACHE_OR_READ_Q :Prefetch hits in cache or read queue
  /external/oprofile/events/x86-64/family10/
unit_masks 125 0x20 Hardware prefetch from data cache
130 0x08 Hardware prefetch from data cache
182 0x02 Prefetch attempts
206 name:prefetch type:bitmask default:0x07
207 0x01 Load (Prefetch, PrefetchT0/T1/T2)
222 0x02 Read Requests including Prefetch
223 0x04 Prefetch Request
280 0x01 Software prefetch hit in L1
281 0x08 Software prefetch hit in L2
  /external/oprofile/events/i386/atom/
events 15 event:0x07 counters:0,1 um:simd_prefetch minimum:6000 name:PREFETCH : Streaming SIMD Extensions (SSE) Prefetch instructions executed
25 event:0x24 counters:0,1 um:core,prefetch minimum:500 name:L2_LINES_IN : L2 cache misses
27 event:0x26 counters:0,1 um:core,prefetch minimum:500 name:L2_LINES_OUT : L2 cache lines evicted
28 event:0x27 counters:0,1 um:core,prefetch minimum:500 name:L2_M_LINES_OUT : Modified lines evicted from the L2 cache
30 event:0x29 counters:0,1 um:core,prefetch,mesi minimum:6000 name:L2_LD : L2 cache reads
33 event:0x2E counters:0,1 um:l2_rqsts,core,prefetch,mesi minimum:6000 name:L2_RQSTS : L2 cache requests
34 event:0x30 counters:0,1 um:core,prefetch,mesi minimum:500 name:L2_REJECT_BUSQ : Rejected L2 cache requests
unit_masks 12 0x08 prefetchnta Streaming SIMD Extensions (SSE) Prefetch NTA instructions executed
111 name:prefetch type:bitmask default:0x60
113 0x20 hw Hardware prefetch only
114 0x00 exclude_hw Exclude hardware prefetch
  /external/chromium/chrome/browser/safe_browsing/
safe_browsing_service_browsertest.cc 397 IN_PROC_BROWSER_TEST_F(SafeBrowsingServiceTest, Prefetch) {
403 explicit SetPrefetchForTest(bool prefetch)
405 ResourceDispatcherHost::set_is_prefetch_enabled(prefetch);
417 // only malware was a prefetch target.
  /external/oprofile/events/x86-64/family11h/
events 50 event:0x4b counters:0,1,2,3 um:prefetch minimum:500 name:PREFETCH_INSTRUCTIONS_DISPATCHED : Prefetch instructions dispatched
unit_masks 56 name:prefetch type:bitmask default:0x07
169 0x02 Prefetch attempts
  /external/oprofile/events/x86-64/hammer/
events 50 event:0x4b counters:0,1,2,3 um:prefetch minimum:500 name:PREFETCH_INSTRUCTIONS_DISPATCHED : Prefetch instructions dispatched
unit_masks 50 name:prefetch type:bitmask default:0x07
163 0x02 Prefetch attempts
  /external/oprofile/events/mips/74K/
events 68 event:0x34 counters:0,2 um:zero minimum:500 name:PREFETCH_INSNS : 52-0 Prefetch instructions graduated
142 event:0x434 counters:1,3 um:zero minimum:500 name:CACHE_HIT_PREFETCH_INSNS : 52-1 PREFETCH instructions which did nothing, because they hit in the cache
  /external/libvpx/vp8/encoder/x86/
variance_impl_sse2.asm 99 ; Prefetch data
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