| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 115 unsigned Reg1, bool isKill1,
117 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1)
|
| X86FastISel.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| AggressiveAntiDepBreaker.h | 101 // UnionGroups - Union Reg1's and Reg2's groups to form a new
104 unsigned UnionGroups(unsigned Reg1, unsigned Reg2);
|
| TargetInstrInfoImpl.cpp | 79 unsigned Reg1 = MI->getOperand(Idx1).getReg();
88 if (HasDef && Reg0 == Reg1 &&
96 Reg0 = Reg1;
108 .addReg(Reg1, getKillRegState(Reg1IsKill), SubReg1);
112 .addReg(Reg1, getKillRegState(Reg1IsKill), SubReg1);
119 MI->getOperand(Idx2).setReg(Reg1);
|
| AggressiveAntiDepBreaker.cpp | 80 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2)
86 unsigned Group1 = GetGroup(Reg1);
[all...] |
| StrongPHIElimination.cpp | 438 void StrongPHIElimination::unionRegs(unsigned Reg1, unsigned Reg2) {
439 Node *Node1 = RegNodeMap[Reg1]->getLeader();
|
| /external/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 76 bool contains(unsigned Reg1, unsigned Reg2) const {
77 return contains(Reg1) && contains(Reg2);
|
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 80 bool contains(unsigned Reg1, unsigned Reg2) const {
81 return MC->contains(Reg1, Reg2);
|
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 599 unsigned Reg1 = MI->getOperand(1).getReg();
604 if (!isARMLowRegister(Reg0) || !isARMLowRegister(Reg1)
610 if (Reg1 != Reg0)
617 } else if (Reg0 != Reg1) {
[all...] |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 137 unsigned Reg1 = MI->getOperand(1).getReg();
144 if (Reg0 == Reg1) {
163 .addReg(Reg1, getKillRegState(Reg1IsKill))
170 MI->getOperand(2).setReg(Reg1);
|
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | [all...] |
