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    Searched refs:isCommutable (Results 1 - 14 of 14) sorted by null

  /external/llvm/include/llvm/CodeGen/
ScheduleDAG.h 258 bool isCommutable : 1; // Is a commutable instruction.
285 isCommutable(false), hasPhysRegDefs(false), hasPhysRegClobbers(false),
299 isCommutable(false), hasPhysRegDefs(false), hasPhysRegClobbers(false),
312 isCommutable(false), hasPhysRegDefs(false), hasPhysRegClobbers(false),
MachineInstr.h 472 /// isCommutable - Return true if this may be a 2- or 3-address
482 bool isCommutable(QueryType Type = IgnoreBundle) const {
    [all...]
  /external/llvm/include/llvm/MC/
MCInstrDesc.h 351 /// isCommutable - Return true if this may be a 2- or 3-address
361 bool isCommutable() const {
  /external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGSDNodes.cpp 97 SU->isCommutable = Old->isCommutable;
409 if (MCID.isCommutable())
410 SU->isCommutable = true;
ScheduleDAGFast.cpp 259 if (MCID.isCommutable())
260 NewSU->isCommutable = true;
ScheduleDAGRRList.cpp     [all...]
  /external/llvm/utils/TableGen/
CodeGenInstruction.h 231 bool isCommutable;
InstrInfoEmitter.cpp 313 if (Inst.isCommutable) OS << "|(1<<MCID::Commutable)";
CodeGenInstruction.cpp 307 isCommutable = R->getValueAsBit("isCommutable");
  /external/llvm/lib/CodeGen/
ScheduleDAGInstrs.cpp 495 SU->isCommutable = MI->isCommutable();
    [all...]
MachineCSE.cpp 421 if (!FoundCSE && MI->isCommutable()) {
TargetInstrInfoImpl.cpp 138 if (!MCID.isCommutable())
RegisterCoalescer.cpp 624 if (!DefMI->isCommutable())
    [all...]
TwoAddressInstructionPass.cpp     [all...]

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