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    Searched refs:retired (Results 1 - 8 of 8) sorted by null

/external/oprofile/events/i386/atom/
unit_masks	23 0x81 ar Floating point computational micro-ops retired 28 0x81 ar Multiply operations retired 31 0x81 ar Divide operations retired 53 0x80 ar SIMD micro-ops retired (excluding stores) 56 0x80 ar SIMD saturated arithmetic micro-ops retired 59 0x81 ar SIMD packed multiply microops retired 61 0x82 ar SIMD packed shift micro-ops retired 63 0x84 ar SIMD pack micro-ops retired 65 0x88 ar SIMD unpack micro-ops retired 67 0x90 ar SIMD packed logical microops retired     [all...]
events	7 event:0xc0 counters:0,1 um:one minimum:6000 name:INST_RETIRED : number of instructions retired 10 event:0xc4 counters:0,1 um:br_inst_retired minimum:500 name:BR_INST_RETIRED : number of branch instructions retired 11 event:0xc5 counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired (precise) 68 event:0xC2 counters:0,1 um:uops_retired minimum:6000 name:UOPS_RETIRED : Micro-ops retired 71 event:0xC7 counters:0,1 um:simd_inst_retired minimum:6000 name:SIMD_INST_RETIRED : Retired Streaming SIMD Extensions (SSE) instructions 73 event:0xCA counters:0,1 um:simd_comp_inst_retired minimum:6000 name:SIMD_COMP_INST_RETIRED : Retired computational Streaming SIMD Extensions (SSE) instructions. 74 event:0xCB counters:0,1 um:mem_load_retired minimum:6000 name:MEM_LOAD_RETIRED : Retired loads 76 event:0xCE counters:0,1 um:zero minimum:6000 name:SIMD_INSTR_RETIRED : SIMD Instructions retired 77 event:0xCF counters:0,1 um:zero minimum:6000 name:SIMD_SAT_INSTR_RETIRED : Saturated arithmetic instructions retired
/external/oprofile/events/i386/nehalem/
events	14 event:0xc0 counters:0,1,2,3 um:inst_retired minimum:6000 name:INST_RETIRED : number of instructions retired 15 event:0xc4 counters:0,1,2,3 um:br_inst_retired minimum:500 name:BR_INST_RETIRED : number of branch instructions retired 16 event:0xc5 counters:0,1,2,3 um:br_misp_retired minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired (precise) 26 event:0x0B counters:0,1,2,3 um:mem_inst_retired minimum:6000 name:MEM_INST_RETIRED : Counts the number of instructions with an architecturally-visible load/store retired on the architected path. 27 event:0x0C counters:0,1,2,3 um:mem_store_retired minimum:6000 name:MEM_STORE_RETIRED : The event counts the number of retired stores that missed the DTLB. The DTLB miss is not counted if the store operation causes a fault. Does not count prefetches. Counts both primary and secondary misses to the TLB 29 event:0x0F counters:0,1,2,3 um:mem_uncore_retired minimum:6000 name:MEM_UNCORE_RETIRED : Counts number of memory load instructions retired where the memory reference hit modified data in another core 48 event:0x42 counters:0,1 um:l1d_cache_lock minimum:6000 name:L1D_CACHE_LOCK : Counts retired load locks in the L1D cache. 58 event:0x53 counters:0,1,2,3 um:one minimum:6000 name:L1D_CACHE_LOCK_FB_HIT : Counts the number of cacheable load lock speculated or retired instructions accepted into the fill buffer. 68 event:0x88 counters:0,1,2,3 um:br_inst_exec minimum:6000 name:BR_INST_EXEC : Counts the number of near branch instructions executed, but not necessarily retired. 69 event:0x89 counters:0,1,2,3 um:br_misp_exec minimum:6000 name:BR_MISP_EXEC : Counts the number of mispredicted conditional near branch instructions executed, but not necessarily retired     [all...]
unit_masks	36 0x01 loads Counts the number of instructions with an architecturally-visible store retired on the architected path 37 0x02 stores Counts the number of instructions with an architecturally-visible store retired on the architected path 39 0x01 dtlb_miss The event counts the number of retired stores that missed the DTLB 45 0x02 other_core_l2_hitm Counts number of memory load instructions retired where the memory reference hit modified data in a sibling core residing on the same socket 46 0x08 remote_cache_local_home_hit Counts number of memory load instructions retired where the memory reference missed the L1, L2 and LLC caches and HIT in a remote socket's cache 47 0x10 remote_dram Counts number of memory load instructions retired where the memory reference missed the L1, L2 and LLC caches and was remotely homed 48 0x20 local_dram Counts number of memory load instructions retired where the memory reference missed the L1, L2 and LLC caches and required a local socket memory reference 145 0x01 hit Counts retired load locks that hit in the L1 data cache or hit in an already allocated fill buffer 146 0x02 s_state Counts L1 data cache retired load locks that hit the target cache line in the shared state 147 0x04 e_state Counts L1 data cache retired load locks that hit the target cache line in the exclusive stat     [all...]
/external/oprofile/events/i386/westmere/
events	16 event:0x0b counters:0,1,2,3 um:mem_inst_retired minimum:2000000 name:MEM_INST_RETIRED : Memory instructions retired above 0 clocks (Precise Event) 17 event:0x0c counters:0,1,2,3 um:x01 minimum:200000 name:MEM_STORE_RETIRED : Retired stores that miss the DTLB (Precise Event) 19 event:0x0f counters:0,1,2,3 um:mem_uncore_retired minimum:40000 name:MEM_UNCORE_RETIRED : Load instructions retired that HIT modified data in sibling core (Precise Event) 63 event:0xc0 counters:0,1,2,3 um:inst_retired minimum:2000000 name:INST_RETIRED : Instructions retired (Programmable counter and Precise Event) 64 event:0xc2 counters:0,1,2,3 um:uops_retired minimum:2000000 name:UOPS_RETIRED : Cycles Uops are being retired 66 event:0xc4 counters:0,1,2,3 um:br_inst_retired minimum:200000 name:BR_INST_RETIRED : Retired branch instructions (Precise Event) 67 event:0xc5 counters:0,1,2,3 um:br_misp_retired minimum:20000 name:BR_MISP_RETIRED : Mispredicted retired branch instructions (Precise Event) 68 event:0xc7 counters:0,1,2,3 um:ssex_uops_retired minimum:200000 name:SSEX_UOPS_RETIRED : SIMD Packed-Double Uops retired (Precise Event) 69 event:0xc8 counters:0,1,2,3 um:x20 minimum:200000 name:ITLB_MISS_RETIRED : Retired instructions that missed the ITLB (Precise Event) 70 event:0xcb counters:0,1,2,3 um:mem_load_retired minimum:200000 name:MEM_LOAD_RETIRED : Retired loads that miss the DTLB (Precise Event     [all...]
unit_masks	39 0x01 conditional Retired conditional branch instructions (Precise Event) 40 0x02 near_call Retired near call instructions (Precise Event) 41 0x04 all_branches Retired branch instructions (Precise Event) 54 0x01 conditional Mispredicted conditional retired branches (Precise Event) 55 0x02 near_call Mispredicted near retired calls (Precise Event) 56 0x04 all_branches Mispredicted retired branch instructions (Precise Event) 101 0x01 any_p Instructions retired (Programmable counter and Precise Event) 102 0x02 x87 Retired floating-point operations (Precise Event) 103 0x04 mmx Retired MMX instructions (Precise Event) 200 0x01 loads Instructions retired which contains a load (Precise Event     [all...]
/external/oprofile/events/x86-64/family10/
unit_masks	256 0x01 SSE bottom-executing uops retired 257 0x02 SSE bottom-serializing uops retired 258 0x04 x87 bottom-executing uops retired 259 0x08 x87 bottom-serializing uops retired
/external/oprofile/events/x86-64/hammer/
events	23 event:0x01 counters:0,1,2,3 um:zero minimum:500 name:CYCLES_NO_FPU_OPS_RETIRED : Cycles with no FPU ops retired 34 event:0x26 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CLFLUSH_INSTRUCTIONS : Retired CLFLUSH instructions 35 event:0x27 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CPUID_INSTRUCTIONS : Retired CPUID instructions 76 event:0xc0 counters:0,1,2,3 um:zero minimum:3000 name:RETIRED_INSTRUCTIONS : Retired instructions (includes exceptions, interrupts, re-syncs) 77 event:0xc1 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_UOPS : Retired micro-ops 78 event:0xc2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired branches (conditional, unconditional, exceptions, interrupts) 79 event:0xc3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired mispredicted branch instructions 80 event:0xc4 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS : Retired taken branch instructions 81 event:0xc5 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED : Retired taken branches mispredicted 82 event:0xc6 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_FAR_CONTROL_TRANSFERS : Retired far control transfer     [all...]

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