| /external/valgrind/main/memcheck/tests/amd64/ |
| xor-undef-amd64.stdout.exp | 14 Complain sse2 pxor
16 No complain sse2 pxor
18 Complain sse2 xorpd
20 No complain sse2 xorpd
|
| sse_memory.c | 2 /* A program to test that SSE/SSE2 insns do not read memory they
226 //TEST_INSN( &AllMask, 0,pavgb) -- dup with sse2?
227 //TEST_INSN( &AllMask, 0,pavgw) -- dup with sse2?
230 //TEST_INSN( &AllMask, 0,pmaxsw) -- dup with sse2?
231 //TEST_INSN( &AllMask, 0,pmaxub) -- dup with sse2?
232 //TEST_INSN( &AllMask, 0,pminsw) -- dup with sse2?
233 //TEST_INSN( &AllMask, 0,pminub) -- dup with sse2?
235 //TEST_INSN( &AllMask, 0,pmulhuw) -- dup with sse2?
236 TEST_INSN( &AllMask, 16,psadbw) // -- XXXXXXXXXXXXXXXX sse2 (xmm variant) not implemented!
253 /* ------------------------ SSE2 ------------------------ *
391 Int sse1 = 0, sse2 = 0; local
[all...] |
| /external/flac/libFLAC/ |
| cpu.c | 170 info->data.ia32.sse2 = false;
184 info->data.ia32.sse2 = (flags_edx & FLAC__CPUINFO_IA32_CPUID_SSE2 )? true : false;
205 fprintf(stderr, " SSE2 ....... %c\n", info->data.ia32.sse2 ? 'Y' : 'n');
214 * now have to check for OS support of SSE/SSE2
216 if(info->data.ia32.fxsr || info->data.ia32.sse || info->data.ia32.sse2) {
219 info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = false;
229 info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = false;
235 info->data.ia32.fxsr = info->data.ia32.sse = info->data.ia32.sse2 = info->data.ia32.sse3 = info->data.ia32.ssse3 = false;
236 else { /* double-check SSE2 */
[all...] |
| /external/libvpx/vp8/encoder/x86/ |
| variance_mmx.c | 97 unsigned int sse0, sse1, sse2, sse3, var; local
103 vp8_get8x8var_mmx(src_ptr + 8 * source_stride, source_stride, ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2) ;
106 var = sse0 + sse1 + sse2 + sse3;
159 unsigned int sse0, sse1, sse2, sse3, var; local
165 vp8_get8x8var_mmx(src_ptr + 8 * source_stride, source_stride, ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2) ;
168 var = sse0 + sse1 + sse2 + sse3;
181 unsigned int sse0, sse1, sse2, sse3, var; local
187 vp8_get8x8var_mmx(src_ptr + 8 * source_stride, source_stride, ref_ptr + 8 * recon_stride, recon_stride, &sse2, &sum2) ;
190 var = sse0 + sse1 + sse2 + sse3;
|
| ssim_opt.asm | 59 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
147 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
|
| /external/flac/libFLAC/include/private/ |
| cpu.h | 54 FLAC__bool sse2; member in struct:__anon6473
|
| /external/openssl/crypto/bn/asm/ |
| bn-586.pl | 9 $sse2=0;
10 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
12 &external_label("OPENSSL_ia32cap_P") if ($sse2);
28 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
34 if ($sse2) {
214 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
220 if ($sse2) {
325 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
331 if ($sse2) {
|
| x86-gf2m.pl | 41 $sse2=0;
42 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
44 &external_label("OPENSSL_ia32cap_P") if ($sse2);
208 if ($sse2) {
|
| x86-mont.pl | 13 # First of all non-SSE2 path should be implemented (yes, for now it
14 # performs Montgomery multiplication/convolution only on SSE2-capable
25 # Modulo-scheduling SSE2 loops results in further 15-20% improvement.
35 $sse2=0;
36 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
38 &external_label("OPENSSL_ia32cap_P") if ($sse2);
107 if($sse2) {
|
| /external/openssl/crypto/ |
| x86cpuid.pl | 9 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
232 if ($sse2) {
233 &and ("ecx",1<<26|1<<24); # check SSE2 and FXSR bits
|
| /external/openssl/crypto/sha/asm/ |
| sha512-586.pl | 18 # SSE2 asm - - 38 24 20
27 # to 50%, but it's less important as they are expected to execute SSE2
29 # code]. SSE2 code-path is as fast as original sha512-sse2.pl, even
31 # SSE2-aware kernel is no longer required to execute the code. Another
41 $sse2=0;
42 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
44 &external_label("OPENSSL_ia32cap_P") if ($sse2);
285 if ($sse2) {
|
| /system/core/libcutils/arch-x86/ |
| sse2-memset32-atom.S | 130 .section .text.sse2,"ax",@progbits
153 .pushsection .rodata.sse2,"a",@progbits
396 .pushsection .rodata.sse2,"a",@progbits
|
| sse2-memset16-atom.S | 130 .section .text.sse2,"ax",@progbits
156 .pushsection .rodata.sse2,"a",@progbits
482 .pushsection .rodata.sse2,"a",@progbits
|
| /external/libvpx/vp8/encoder/ |
| rdopt.c | 452 unsigned int sse2 = 0; local
468 VARIANCE_INVOKE(rtcd, subpixvar8x8)(uptr, pre_stride, mv_col & 7, mv_row & 7, upred_ptr, uv_stride, &sse2);
470 sse2 += sse1;
474 VARIANCE_INVOKE(rtcd, subpixvar8x8)(uptr, pre_stride, mv_col & 7, mv_row & 7, upred_ptr, uv_stride, &sse2);
476 sse2 += sse1;
479 return sse2;
2262 int sse2 = 0; local
[all...] |
| pickinter.c | 827 int sse2 = 0; local
829 sse2 = VP8_UVSSE(x, IF_RTCD(&cpi->rtcd.variance));
831 if (sse2 * 2 < x->encode_breakout)
|
| /bionic/libc/arch-x86/string/ |
| sse2-memset5-atom.S | 139 .section .text.sse2,"ax",@progbits
163 .pushsection .rodata.sse2,"a",@progbits
445 .pushsection .rodata.sse2,"a",@progbits
|
| /external/openssl/crypto/modes/asm/ |
| ghash-x86.pl | 122 $sse2=0;
123 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
337 if (!$sse2) {{ # pure-MMX "May" version...
815 if ($sse2) {{
[all...] |
| /external/libvpx/build/make/ |
| configure.sh | 846 soft_enable sse2
|
