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  /external/llvm/test/CodeGen/PowerPC/
2006-07-19-stwbrx-crash.ll 1 ; RUN: llc < %s -march=ppc32
and-imm.ll 1 ; RUN: llc < %s -march=ppc32 | not grep {ori\\|lis}
big-endian-formal-args.ll 1 ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | FileCheck %s
cmp-cmp.ll 1 ; RUN: llc < %s -march=ppc32 | not grep mfcr
cttz.ll 2 ; RUN: llc < %s -march=ppc32 | grep -i cntlzw
fold-li.ll 1 ; RUN: llc < %s -march=ppc32 | \
inlineasm-copy.ll 1 ; RUN: llc < %s -march=ppc32 | not grep mr
ppcf128-2.ll 1 ; RUN: llc < %s -march=ppc64
reg-coalesce-simple.ll 1 ; RUN: llc < %s -march=ppc32 | not grep or
seteq-0.ll 1 ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \
shift128.ll 1 ; RUN: llc < %s -march=ppc64 | grep sld | count 5
tailcall1-64.ll 1 ; RUN: llc < %s -march=ppc64 -tailcallopt | grep TC_RETURNd8
tailcall1.ll 1 ; RUN: llc < %s -march=ppc32 -tailcallopt | grep TC_RETURN
vec_fneg.ll 1 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vsubfp
vec_shift.ll 1 ; RUN: llc < %s -march=ppc32 -mcpu=g5
vec_zero.ll 1 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vxor
  /external/llvm/test/CodeGen/SPARC/
2007-07-05-LiveIntervalAssert.ll 1 ; RUN: llc < %s -march=sparc
  /external/llvm/test/CodeGen/Thumb/
long-setcc.ll 1 ; RUN: llc < %s -march=thumb | grep cmp | count 1
  /external/llvm/test/CodeGen/Thumb2/
thumb2-clz.ll 1 ; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7 | FileCheck %s
thumb2-sub5.ll 1 ; RUN: llc < %s -march=thumb -mattr=+thumb2 -mattr=+32bit | FileCheck %s
  /external/llvm/test/CodeGen/X86/
2006-07-12-InlineAsmQConstraint.ll 1 ; RUN: llc < %s -march=x86
2006-10-09-CycleInDAG.ll 1 ; RUN: llc < %s -march=x86
2007-02-23-DAGCombine-Miscompile.ll 2 ; RUN: llc < %s -march=x86 | FileCheck %s
2007-03-24-InlineAsmMultiRegConstraint.ll 1 ; RUN: llc < %s -march=x86
2007-03-24-InlineAsmPModifier.ll 1 ; RUN: llc < %s -march=x86 | grep {mov %gs:72, %eax}

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