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  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeTypesGeneric.cpp 95 // Handle cases like i64 = BITCAST v1i64 on x86, where the operand
275 // x86 this turns v1i64 = BITCAST i64 into v1i64 = BITCAST v2i32.
LegalizeVectorOps.cpp 276 // v1i64.
  /external/llvm/lib/Target/ARM/
ARMRegisterInfo.td 260 def DPR : RegisterClass<"ARM", [f64, v8i8, v4i16, v2i32, v1i64, v2f32], 64,
269 def DPR_VFP2 : RegisterClass<"ARM", [f64, v8i8, v4i16, v2i32, v1i64, v2f32], 64,
276 def DPR_8 : RegisterClass<"ARM", [f64, v8i8, v4i16, v2i32, v1i64, v2f32], 64,
ARMInstrNEON.td     [all...]
ARMISelDAGToDAG.cpp     [all...]
ARMISelLowering.cpp 464 addDRTypeForNEON(MVT::v1i64);
522 // Neon does not support some operations on v1i64 and v2i64 types.
523 setOperationAction(ISD::MUL, MVT::v1i64, Expand);
533 setOperationAction(ISD::SETCC, MVT::v1i64, Expand);
    [all...]
  /external/llvm/utils/TableGen/
CodeGenTarget.cpp 82 case MVT::v1i64: return "MVT::v1i64";
CodeGenDAGPatterns.cpp     [all...]
  /external/llvm/include/llvm/
Intrinsics.td 130 def llvm_v1i64_ty : LLVMType<v1i64>; // 1 x i64
  /external/llvm/lib/Target/
TargetData.cpp 154 setAlignment(VECTOR_ALIGN, 8, 8, 64); // v2i32, v1i64, ...
  /external/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]
  /external/clang/utils/ABITest/
ABITestGen.py 462 action="store", type=str, default='v2i16, v1i64, v2i32, v4i16, v8i8, v2f32, v2i64, v4i32, v8i16, v16i8, v2f64, v4f32, v16f32', metavar="N")

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