| /prebuilts/ndk/android-ndk-r7/platforms/android-5/arch-arm/usr/include/asm/ |
| mtd-xip.h | 18 #define xip_iprefetch() do { asm volatile (".rep 8; nop; .endr"); } while (0)
|
| /prebuilts/ndk/android-ndk-r7/platforms/android-8/arch-arm/usr/include/asm/ |
| atomic.h | 17 typedef struct { volatile int counter; } atomic_t;
|
| mtd-xip.h | 18 #define xip_iprefetch() do { asm volatile (".rep 8; nop; .endr"); } while (0)
|
| /prebuilts/ndk/android-ndk-r7/platforms/android-9/arch-arm/usr/include/asm/ |
| atomic.h | 17 typedef struct { volatile int counter; } atomic_t;
|
| mtd-xip.h | 18 #define xip_iprefetch() do { asm volatile (".rep 8; nop; .endr"); } while (0)
|
| /external/clang/test/SemaCXX/ |
| overloaded-builtin-operators.cpp | 67 operator volatile long&();
87 volatile long& lr1 = (lr *= sr);
99 volatile long& lr2 = (lr <<= sr);
105 operator int volatile *();
113 operator int volatile *&();
124 volatile int& vir1 = vip[sr];
125 volatile int& vir2 = sr[vip];
130 int volatile *vip1 = vipr++;
132 int volatile *&vipr1 = ++vipr;
136 int volatile &ivr = *vip
[all...] |
| warn-self-assign.cpp | 33 // Volatile stores aren't side-effect free.
34 volatile int vol_a;
36 volatile int &vol_a_ref = vol_a;
|
| cxx0x-cursory-default-delete.cpp | 35 bad_decls(volatile bad_decls&) = default; // expected-error {{may not be volatile}}
37 bad_decls& operator = (volatile bad_decls&) = default; // expected-error {{may not be volatile}}
38 bad_decls& operator = (const bad_decls&) const = default; // expected-error {{may not have 'const', 'constexpr' or 'volatile' qualifiers}}
|
| issue547.cpp | 19 struct classify_function<R(Args...) volatile> {
24 struct classify_function<R(Args...) const volatile> {
39 struct classify_function<R(Args......) volatile> {
44 struct classify_function<R(Args......) const volatile> {
59 typedef void f1(int, float...) const volatile;
|
| /external/kernel-headers/original/asm-arm/arch/ |
| mtd-xip.h | 28 ((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
33 volatile xip_omap_mpu_timer_regs_t* timer = xip_omap_mpu_timer_base(nr);
59 #define xip_cpu_idle() asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (1))
|
| /external/libffi/testsuite/libffi.call/ |
| return_fl2.c | 10 /* Use volatile float to avoid false negative on ix86. See PR target/323. */
13 volatile float sum;
24 volatile float sum;
|
| /external/llvm/test/Transforms/DeadArgElim/ |
| deadexternal.ll | 33 store volatile i32 10, i32* %i, align 4
34 ; CHECK: %tmp = load volatile i32* %i, align 4
36 %tmp = load volatile i32* %i, align 4
|
| /external/llvm/test/Transforms/InstCombine/ |
| 2008-04-29-VolatileLoadMerge.ll | 1 ; RUN: opt < %s -instcombine -S | grep {load volatile} | count 2
10 %tmp34 = load volatile i32* @g_1, align 4 ; <i32> [#uses=1]
14 %tmp3 = load volatile i32* @g_1, align 4 ; <i32> [#uses=1]
|
| /external/smali/smali/src/test/resources/LexerTest/ |
| InstructionTest.smali | 76 sget-volatile
77 sget-wide-volatile
78 sget-object-volatile
79 sput-volatile
80 sput-wide-volatile
81 sput-object-volatile
116 iget-volatile
117 iget-wide-volatile
118 iget-object-volatile
119 iput-volatile
[all...] |
| InstructionTest.tokens | 76 INSTRUCTION_FORMAT21c_FIELD_ODEX("sget-volatile")
77 INSTRUCTION_FORMAT21c_FIELD_ODEX("sget-wide-volatile")
78 INSTRUCTION_FORMAT21c_FIELD_ODEX("sget-object-volatile")
79 INSTRUCTION_FORMAT21c_FIELD_ODEX("sput-volatile")
80 INSTRUCTION_FORMAT21c_FIELD_ODEX("sput-wide-volatile")
81 INSTRUCTION_FORMAT21c_FIELD_ODEX("sput-object-volatile")
116 INSTRUCTION_FORMAT22c_FIELD_ODEX("iget-volatile")
117 INSTRUCTION_FORMAT22c_FIELD_ODEX("iget-wide-volatile")
118 INSTRUCTION_FORMAT22c_FIELD_ODEX("iget-object-volatile")
119 INSTRUCTION_FORMAT22c_FIELD_ODEX("iput-volatile")
[all...] |
| /external/v8/src/ |
| atomicops_internals_mips_gcc.h | 48 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
71 inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
92 inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
112 inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
126 inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
135 inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
144 inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
152 inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
157 inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
162 inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr)
[all...] |
| /external/valgrind/main/none/tests/s390x/ |
| op_exception.c | 10 static volatile int got_ill;
26 asm volatile(".long 0\n");
33 asm volatile(".long 0xffffffff\n.long 0xffff0000\n");
|
| /external/webkit/Source/JavaScriptCore/wtf/ |
| DynamicAnnotations.cpp | 32 void WTFAnnotateBenignRaceSized(const char*, int, const volatile void*, long, const char*) { }
33 void WTFAnnotateHappensBefore(const char*, int, const volatile void*) { }
34 void WTFAnnotateHappensAfter(const char*, int, const volatile void*) { }
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/inc/ |
| basetype.h | 23 #define VOLATILE volatile
25 #define VOLATILE
|
| /bionic/libc/kernel/arch-mips/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val); }
77 #define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) static inline void pfx##out##bwlq##p(type val, unsigned long port) { volatile type *__addr; type __val; __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); __val = pfx##ioswab##bwlq(__addr, val); BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); *__addr = __val; slow; } static inline type pfx##in##bwlq##p(unsigned long port) { volatile type *__addr; type __val; __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); __val = *__addr; slow; return pfx##ioswab##bwlq(__addr, __val); }
92 #define __BUILD_MEMORY_STRING(bwlq, type) static inline void writes##bwlq(volatile void __iomem *mem, const void *addr, unsigned int count) { const volatile type *__addr = addr; while (count--) { __mem_write##bwlq(*__addr, mem); __addr++; } } static inline void reads##bwlq(volatile void __iomem *mem, void *addr, unsigned int count) { volatile type *__addr = addr; while (count--) { *__addr = __mem_read##bwlq(mem); __addr++; }
[all...] |
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val); }
77 #define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) static inline void pfx##out##bwlq##p(type val, unsigned long port) { volatile type *__addr; type __val; __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); __val = pfx##ioswab##bwlq(__addr, val); BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); *__addr = __val; slow; } static inline type pfx##in##bwlq##p(unsigned long port) { volatile type *__addr; type __val; __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); __val = *__addr; slow; return pfx##ioswab##bwlq(__addr, __val); }
92 #define __BUILD_MEMORY_STRING(bwlq, type) static inline void writes##bwlq(volatile void __iomem *mem, const void *addr, unsigned int count) { const volatile type *__addr = addr; while (count--) { __mem_write##bwlq(*__addr, mem); __addr++; } } static inline void reads##bwlq(volatile void __iomem *mem, void *addr, unsigned int count) { volatile type *__addr = addr; while (count--) { *__addr = __mem_read##bwlq(mem); __addr++; }
[all...] |
| /prebuilts/gcc/darwin-x86/mips/mipsel-linux-android-4.4.3/sysroot/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val); }
77 #define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) static inline void pfx##out##bwlq##p(type val, unsigned long port) { volatile type *__addr; type __val; __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); __val = pfx##ioswab##bwlq(__addr, val); BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); *__addr = __val; slow; } static inline type pfx##in##bwlq##p(unsigned long port) { volatile type *__addr; type __val; __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); __val = *__addr; slow; return pfx##ioswab##bwlq(__addr, __val); }
92 #define __BUILD_MEMORY_STRING(bwlq, type) static inline void writes##bwlq(volatile void __iomem *mem, const void *addr, unsigned int count) { const volatile type *__addr = addr; while (count--) { __mem_write##bwlq(*__addr, mem); __addr++; } } static inline void reads##bwlq(volatile void __iomem *mem, void *addr, unsigned int count) { volatile type *__addr = addr; while (count--) { *__addr = __mem_read##bwlq(mem); __addr++; }
[all...] |
| /prebuilts/gcc/linux-x86/mips/mipsel-linux-android-4.4.3/sysroot/usr/include/asm/ |
| io.h | 76 #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val); }
77 #define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) static inline void pfx##out##bwlq##p(type val, unsigned long port) { volatile type *__addr; type __val; __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); __val = pfx##ioswab##bwlq(__addr, val); BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); *__addr = __val; slow; } static inline type pfx##in##bwlq##p(unsigned long port) { volatile type *__addr; type __val; __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); __val = *__addr; slow; return pfx##ioswab##bwlq(__addr, __val); }
92 #define __BUILD_MEMORY_STRING(bwlq, type) static inline void writes##bwlq(volatile void __iomem *mem, const void *addr, unsigned int count) { const volatile type *__addr = addr; while (count--) { __mem_write##bwlq(*__addr, mem); __addr++; } } static inline void reads##bwlq(volatile void __iomem *mem, void *addr, unsigned int count) { volatile type *__addr = addr; while (count--) { *__addr = __mem_read##bwlq(mem); __addr++; }
[all...] |
| /bootable/bootloader/legacy/nandwrite/ |
| jtag.c | 38 volatile unsigned _jtag_cmd = 0;
39 volatile unsigned _jtag_msg = 0;
43 volatile unsigned _jtag_arg0 = 0;
44 volatile unsigned _jtag_arg1 = 0;
45 volatile unsigned _jtag_arg2 = 0;
|
| /external/clang/test/CXX/expr/expr.prim/expr.prim.lambda/ |
| p5.cpp | 21 auto l = [=](){}; // expected-note{{method is not marked volatile}}
27 // expected-note{{method is not marked volatile}}
32 // It is neither virtual nor declared volatile.
33 volatile decltype(l) lv = l;
34 volatile decltype(ml) mlv = ml;
|
