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  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 46 cl::desc("Enable ARM 2-addr to 3-addr conv"));
50 cl::desc("Widen ARM vmovs to vmovd when possible"));
    [all...]
ARMExpandPseudoInsts.cpp 34 cl::desc("Verify machine code after expanding ARM pseudos"));
75 const MCInstrDesc &Desc = OldMI.getDesc();
76 for (unsigned i = Desc.getNumOperands(), e = OldMI.getNumOperands();
    [all...]
  /external/clang/lib/CodeGen/
CGObjCMac.cpp     [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGRRList.cpp 67 cl::desc("Disable cycle-level precision during preRA scheduling"));
73 cl::desc("Disable regpressure priority in sched=list-ilp"));
76 cl::desc("Disable live use priority in sched=list-ilp"));
79 cl::desc("Disable virtual register cycle interference checks"));
82 cl::desc("Disable physreg def-use affinity"));
85 cl::desc("Disable no-stall priority in sched=list-ilp"));
88 cl::desc("Disable critical path priority in sched=list-ilp"));
91 cl::desc("Disable scheduled-height priority in sched=list-ilp"));
94 cl::desc("Disable scheduler's two-address hack"));
98 cl::desc("Number of instructions to allow ahead of the critical path
    [all...]
  /external/clang/lib/Rewrite/
RewriteModernObjC.cpp 415 std::string Tag, std::string Desc);
    [all...]
RewriteObjC.cpp 381 std::string Tag, std::string Desc);
    [all...]
  /external/llvm/lib/Target/X86/
X86InstrInfo.cpp 44 cl::desc("Disable fusing of spill code into instructions"));
47 cl::desc("Print instructions that the allocator wants to"
52 cl::desc("Re-materialize load from stub in PIC mode"),
    [all...]

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