/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 76 const TargetMachine &TM, SmallVector<CCValAssign, 16> &locs, 78 : CCState(CC, isVarArg, MF, TM, locs, C) { 165 static TargetLoweringObjectFile *createTLOF(TargetMachine &TM) { 166 if (TM.getSubtarget<ARMSubtarget>().isTargetDarwin()) 172 ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) 173 : TargetLowering(TM, createTLOF(TM)) { 174 Subtarget = &TM.getSubtarget<ARMSubtarget>(); 175 RegInfo = TM.getRegisterInfo(); 176 Itins = TM.getInstrItineraryData() [all...] |
ARMBaseInstrInfo.cpp | 98 CreateTargetHazardRecognizer(const TargetMachine *TM, 101 const InstrItineraryData *II = TM->getInstrItineraryData(); 104 return TargetInstrInfoImpl::CreateTargetHazardRecognizer(TM, DAG); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGBuilder.cpp | [all...] |
LegalizeDAG.cpp | 50 const TargetMachine &TM; 206 : TM(dag.getTarget()), TLI(dag.getTargetLoweringInfo()), [all...] |
TargetLowering.cpp | 522 TargetLowering::TargetLowering(const TargetMachine &tm, 524 : TM(tm), TD(TM.getTargetData()), TLOF(*tlof), [all...] |
SelectionDAG.cpp | 855 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 856 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
DwarfDebug.cpp | 319 const TargetRegisterInfo *RI = Asm->TM.getRegisterInfo(); [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 60 MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) : 61 TargetLowering(tm, new TargetLoweringObjectFileELF()), 62 Subtarget(*tm.getSubtargetImpl()), TM(tm) { [all...] |