| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.h | 64 unsigned RegNo = MO.getReg();
86 O << getRegisterName(MO1.getReg())
96 O << getRegisterName(MO1.getReg())
|
| HexagonExpandPredSpillCode.cpp | 79 unsigned FP = MI->getOperand(0).getReg();
84 int SrcReg = MI->getOperand(2).getReg();
121 int DstReg = MI->getOperand(0).getReg();
124 unsigned FP = MI->getOperand(1).getReg();
|
| /external/llvm/lib/Target/Hexagon/InstPrinter/ |
| HexagonInstPrinter.cpp | 62 O << getRegisterName(MO.getReg());
102 O << getRegisterName(MO0.getReg());
111 O << getRegisterName(MO0.getReg()) << ", #" << MO1.getImm();
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 327 .addReg(MI.getOperand(1).getReg());
332 .addReg(MI.getOperand(1).getReg());
335 BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), MI.getOperand(0).getReg())
340 BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), MI.getOperand(0).getReg())
343 .addReg(MI.getOperand(1).getReg(), RegState::ImplicitKill);
348 .addReg(MI.getOperand(1).getReg());
351 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), MI.getOperand(0).getReg())
356 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), MI.getOperand(0).getReg())
359 .addReg(MI.getOperand(1).getReg(), RegState::ImplicitKill);
392 unsigned SrcReg = MI.getOperand(0).getReg();
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 79 assert(MO.isReg() && MO.getReg());
388 unsigned DstReg = MI.getOperand(OpIdx++).getReg();
462 unsigned SrcReg = MI.getOperand(OpIdx++).getReg();
519 DstReg = MI.getOperand(OpIdx++).getReg();
543 GetDSubRegs(MO.getReg(), RegSpc, TRI, D0, D1, D2, D3);
592 unsigned SrcReg = MI.getOperand(OpIdx++).getReg();
616 unsigned DstReg = MI.getOperand(0).getReg();
[all...] |
| ARMMCInstLower.cpp | 72 if (MO.isImplicit() && MO.getReg() != ARM::CPSR)
75 MCOp = MCOperand::CreateReg(MO.getReg());
|
| Thumb2ITBlockPass.cpp | 67 unsigned Reg = MO.getReg();
121 unsigned DstReg = MI->getOperand(0).getReg();
122 unsigned SrcReg = MI->getOperand(1).getReg();
146 MI->getOperand(MCID.getNumOperands() - 1).getReg() == ARM::CPSR)
|
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| LocalList.java | 268 return spec.getReg();
425 if (test.getRegisterSpec().getReg() == reg) {
577 int regNum = startedLocal.getReg();
713 int regNum = endedLocal.getReg();
783 int regNum = endedLocal.getReg();
795 if (entry.getRegisterSpec().getReg() == regNum) {
851 int regNum = spec.getReg();
879 int regNum = spec.getReg();
|
| /dalvik/dexgen/src/com/android/dexgen/dex/code/form/ |
| Form21h.java | 75 unsignedFitsInByte(regs.get(0).getReg()))) {
118 write(out, opcodeUnit(insn, regs.get(0).getReg()), bits);
|
| /dalvik/dx/src/com/android/dx/dex/code/ |
| LocalList.java | 268 return spec.getReg();
425 if (test.getRegisterSpec().getReg() == reg) {
577 int regNum = startedLocal.getReg();
713 int regNum = endedLocal.getReg();
783 int regNum = endedLocal.getReg();
795 if (entry.getRegisterSpec().getReg() == regNum) {
851 int regNum = spec.getReg();
879 int regNum = spec.getReg();
|
| /external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
| LocalList.java | 268 return spec.getReg();
425 if (test.getRegisterSpec().getReg() == reg) {
577 int regNum = startedLocal.getReg();
713 int regNum = endedLocal.getReg();
783 int regNum = endedLocal.getReg();
795 if (entry.getRegisterSpec().getReg() == regNum) {
851 int regNum = spec.getReg();
879 int regNum = spec.getReg();
|
| /external/llvm/include/llvm/CodeGen/ |
| LiveRangeEdit.h | 116 unsigned getReg() const { return parent_.reg; }
136 return createFrom(getReg());
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 504 unsigned getReg() const {
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/ |
| BasicRegisterMapper.java | 58 newReg = oldToNew.get(registerSpec.getReg());
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| BasicRegisterMapper.java | 58 newReg = oldToNew.get(registerSpec.getReg());
|
| /external/llvm/include/llvm/MC/ |
| MachineLocation.h | 52 unsigned getReg() const { return Register; }
|
| /external/llvm/lib/CodeGen/ |
| DeadMachineInstructionElim.cpp | 70 unsigned Reg = MO.getReg();
140 unsigned Reg = MO.getReg();
168 unsigned Reg = MO.getReg();
188 unsigned Reg = MO.getReg();
|
| StrongPHIElimination.cpp | 227 if (MO.isReg() && MO.isUse() && MO.getReg() == Reg)
243 unsigned DestReg = BBI->getOperand(0).getReg();
249 unsigned SrcReg = SrcMO.getReg();
287 unsigned DestReg = BBI->getOperand(0).getReg();
291 unsigned SrcReg = BBI->getOperand(i).getReg();
308 unsigned SrcReg = PHI->getOperand(1).getReg();
317 unsigned DestReg = PHI->getOperand(0).getReg();
322 unsigned SrcReg = PHI->getOperand(i).getReg();
460 unsigned DestReg = PHI->getOperand(0).getReg();
466 unsigned SrcColor = getRegColor(PHI->getOperand(i).getReg());
[all...] |
| MachineSink.cpp | 119 unsigned SrcReg = MI->getOperand(1).getReg();
120 unsigned DstReg = MI->getOperand(0).getReg();
304 unsigned Reg = MO.getReg();
400 DI->getOperand(0).getReg() == MI->getOperand(0).getReg())
479 unsigned Reg = MO.getReg();
599 unsigned Reg = MO.getReg();
|
| PHIElimination.cpp | 139 unsigned DefReg = DefMI->getOperand(0).getReg();
179 unsigned SrcReg = MPhi->getOperand(i).getReg();
202 unsigned DestReg = MPhi->getOperand(0).getReg();
282 MPhi->getOperand(i).getReg())];
288 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
405 BBI->getOperand(i).getReg())];
419 unsigned Reg = BBI->getOperand(i).getReg();
|
| /external/llvm/lib/MC/ |
| MCInst.cpp | 23 OS << "Reg:" << getReg();
|
| /external/llvm/lib/Target/MBlaze/InstPrinter/ |
| MBlazeInstPrinter.cpp | 39 O << getRegisterName(Op.getReg());
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeDelaySlotFiller.cpp | 138 unsigned aop_reg = a->getOperand(aop).getReg();
146 unsigned mop_reg = m->getOperand(mop).getReg();
163 unsigned aop_reg = a->getOperand(aop).getReg();
167 unsigned bop_reg = b->getOperand(bop).getReg();
|
| /external/llvm/lib/Target/Sparc/ |
| DelaySlotFiller.cpp | 216 unsigned Reg = MO.getReg();
246 RegUses.insert(Reg.getReg());
253 RegUses.insert(RegOrImm.getReg());
268 unsigned Reg = MO.getReg();
|
| /external/llvm/lib/Target/X86/ |
| X86AsmPrinter.cpp | 238 unsigned Reg = MO.getReg();
311 bool HasBaseReg = BaseReg.getReg() != 0;
313 BaseReg.getReg() == X86::RIP)
317 bool HasParenPart = IndexReg.getReg() || HasBaseReg;
333 assert(IndexReg.getReg() != X86::ESP &&
340 if (IndexReg.getReg()) {
355 if (Segment.getReg()) {
370 unsigned Reg = MO.getReg();
696 Location.set(MI->getOperand(0).getReg(), MI->getOperand(3).getImm());
719 if (MI->getOperand(0).isReg() && MI->getOperand(0).getReg())
[all...] |
