| /external/llvm/lib/CodeGen/ |
| LiveIntervalAnalysis.cpp | 140 unsigned Reg = MI.getOperand(MOIdx).getReg();
145 if (MO.getReg() == Reg && MO.isDef()) {
450 if (TargetRegisterInfo::isVirtualRegister(MO.getReg()))
452 getOrCreateInterval(MO.getReg()));
455 getOrCreateInterval(MO.getReg()));
596 if (!MO.isReg() || !MO.getReg())
603 UndefUses.push_back(MO.getReg());
810 unsigned Reg = MO.getReg();
816 RegOp = MO.getReg();
[all...] |
| TailDuplication.cpp | 273 unsigned Dst = Copy->getOperand(0).getReg();
274 unsigned Src = Copy->getOperand(1).getReg();
352 unsigned SrcReg = MI.getOperand(i).getReg();
383 unsigned DefReg = MI->getOperand(0).getReg();
386 unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
420 unsigned Reg = MO.getReg();
464 unsigned Reg = MO0.getReg();
[all...] |
| MachineVerifier.cpp | 653 if (MO->isReg() && !MO->isImplicit() && !MI->isVariadic() && MO->getReg())
659 const unsigned Reg = MO->getReg();
758 const unsigned Reg = MO->getReg();
768 unsigned DefReg = MI->getOperand(defIdx).getReg();
[all...] |
| Spiller.cpp | 111 if (!op.isReg() || op.getReg() != li->reg)
|
| BranchFolding.cpp | 138 unsigned Reg = I->getOperand(0).getReg();
157 unsigned Reg = MO.getReg();
263 case MachineOperand::MO_Register: OperandHash = Op.getReg(); break;
[all...] |
| /dalvik/dx/src/com/android/dx/cf/code/ |
| OneLocalsArray.java | 137 set(spec.getReg(), spec);
|
| /dalvik/dx/src/com/android/dx/ssa/ |
| PhiTypeResolver.java | 102 worklist.set(resultReg.getReg());
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| PhiTypeResolver.java | 102 worklist.set(resultReg.getReg());
|
| /external/llvm/include/llvm/MC/ |
| MCInst.h | 62 /// getReg - Returns the register number.
63 unsigned getReg() const {
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeMCInstLower.cpp | 127 MCOp = MCOperand::CreateReg(MO.getReg());
|
| /external/llvm/lib/Target/Mips/InstPrinter/ |
| MipsInstPrinter.cpp | 132 printRegName(O, Op.getReg());
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelDAGToDAG.cpp | 194 (MI.getOperand(1).getReg() == Mips::ZERO) &&
196 DstReg = MI.getOperand(0).getReg();
199 (MI.getOperand(1).getReg() == Mips::ZERO_64) &&
201 DstReg = MI.getOperand(0).getReg();
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCAsmPrinter.cpp | 91 Location.set(MI->getOperand(0).getReg(), MI->getOperand(2).getImm());
151 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg());
374 getRegisterName(MI->getOperand(1).getReg()));
376 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
|
| /external/llvm/lib/Target/X86/ |
| X86VZeroUpper.cpp | 131 if (isYmmReg(MO.getReg()))
|
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMConstantIslandPass.cpp | [all...] |
| ARMFrameLowering.cpp | 103 if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs))
110 isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs) &&
111 MI->getOperand(1).getReg() == ARM::SP)
167 unsigned Reg = CSI[i].getReg();
450 addReg(JumpTarget.getReg(), RegState::Kill);
583 unsigned Reg = CSI[i-1].getReg();
654 unsigned Reg = CSI[i-1].getReg();
731 unsigned DNum = CSI[i].getReg() - ARM::D8;
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| RegisterSpec.java | 321 public int getReg() {
437 if ((other == null) || (reg != other.getReg())) {
|
| /dalvik/dx/src/com/android/dx/dex/code/ |
| InsnFormat.java | 445 int first = list.get(0).getReg();
450 if (one.getReg() != next) {
|
| /dalvik/dx/src/com/android/dx/rop/code/ |
| RegisterSpec.java | 326 public int getReg() {
442 if ((other == null) || (reg != other.getReg())) {
|
| /external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
| InsnFormat.java | 445 int first = list.get(0).getReg();
450 if (one.getReg() != next) {
|
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| RegisterSpec.java | 326 public int getReg() {
442 if ((other == null) || (reg != other.getReg())) {
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUAsmPrinter.cpp | 66 O << getRegisterName(MO.getReg());
118 O << getRegisterName(MO.getReg()) << ", ";
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 117 unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
602 unsigned Reg = cast<RegisterSDNode>(Use->getOperand(1))->getReg();
736 if (II->getReg()) {
737 Reg = II->getReg();
745 assert(I->getReg() && "Unknown physical register!");
751 .addReg(I->getReg());
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfCompileUnit.cpp | 274 addRegisterOp(Block, Location.getReg());
276 addRegisterOffset(Block, Location.getReg(), Location.getOffset());
297 addRegisterOffset(Block, Location.getReg(), DV->getAddrElement(1));
300 addRegisterOp(Block, Location.getReg());
303 addRegisterOffset(Block, Location.getReg(), Location.getOffset());
422 unsigned Reg = RI->getDwarfRegNum(Location.getReg(), false);
[all...] |
