/dalvik/vm/compiler/ |
Dataflow.cpp | 821 char *dvmCompilerGetDalvikDisassembly(const DecodedInstruction *insn, 825 Opcode opcode = insn->opcode; 841 flags = dexGetFlagsFromOpcode(insn->opcode); 849 InstructionFormat dalvikFormat = dexGetFormatFromOpcode(insn->opcode); 853 snprintf(buffer + strlen(buffer), 256, " v%d,", insn->vA); 854 offset = (int) insn->vB; 858 insn->vA, insn->vB); 859 offset = (int) insn->vC; 864 offset = (int) insn->vA 926 const DecodedInstruction *insn = &mir->dalvikInsn; local [all...] |
Compiler.h | 197 const DecodedInstruction *insn); 225 char *dvmCompilerGetDalvikDisassembly(const DecodedInstruction *insn,
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/dalvik/dexgen/src/com/android/dexgen/dex/code/ |
LocalList.java | 330 * Go through the insn list, looking for all the local 338 * insn lists that contain local ends, but I (danfuzz) expect 348 DalvInsn insn = insns.get(i); local 350 if (insn instanceof LocalSnapshot) { 352 ((LocalSnapshot) insn).getLocals(); 353 state.snapshot(insn.getAddress(), snapshot); 354 } else if (insn instanceof LocalStart) { 355 RegisterSpec local = ((LocalStart) insn).getLocal(); 356 state.startLocal(insn.getAddress(), local); 357 } else if (insn instanceof LocalEnd) [all...] |
RopToDop.java | 19 import com.android.dexgen.rop.code.Insn; 34 * Translator from rop-level {@link Insn} instances to corresponding 281 * @param insn {@code non-null;} the original instruction 285 public static Dop dopFor(Insn insn) { 286 Rop rop = insn.getOpcode(); 325 RegisterSpec resultReg = insn.getResult(); 352 (CstFieldRef) ((ThrowingCstInsn) insn).getConstant(); 365 (CstFieldRef) ((ThrowingCstInsn) insn).getConstant(); 378 (CstFieldRef) ((ThrowingCstInsn) insn).getConstant() [all...] |
/dalvik/dx/src/com/android/dx/dex/code/ |
LocalList.java | 330 * Go through the insn list, looking for all the local 338 * insn lists that contain local ends, but I (danfuzz) expect 348 DalvInsn insn = insns.get(i); local 350 if (insn instanceof LocalSnapshot) { 352 ((LocalSnapshot) insn).getLocals(); 353 state.snapshot(insn.getAddress(), snapshot); 354 } else if (insn instanceof LocalStart) { 355 RegisterSpec local = ((LocalStart) insn).getLocal(); 356 state.startLocal(insn.getAddress(), local); 357 } else if (insn instanceof LocalEnd) [all...] |
RopToDop.java | 19 import com.android.dx.rop.code.Insn; 34 * Translator from rop-level {@link Insn} instances to corresponding 453 * @param insn {@code non-null;} the original instruction 457 public static Dop dopFor(Insn insn) { 458 Rop rop = insn.getOpcode(); 497 RegisterSpec resultReg = insn.getResult(); 524 (CstFieldRef) ((ThrowingCstInsn) insn).getConstant(); 537 (CstFieldRef) ((ThrowingCstInsn) insn).getConstant(); 550 (CstFieldRef) ((ThrowingCstInsn) insn).getConstant() [all...] |
/external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
LocalList.java | 330 * Go through the insn list, looking for all the local 338 * insn lists that contain local ends, but I (danfuzz) expect 348 DalvInsn insn = insns.get(i); local 350 if (insn instanceof LocalSnapshot) { 352 ((LocalSnapshot) insn).getLocals(); 353 state.snapshot(insn.getAddress(), snapshot); 354 } else if (insn instanceof LocalStart) { 355 RegisterSpec local = ((LocalStart) insn).getLocal(); 356 state.startLocal(insn.getAddress(), local); 357 } else if (insn instanceof LocalEnd) [all...] |
RopToDop.java | 19 import com.android.dx.rop.code.Insn; 34 * Translator from rop-level {@link Insn} instances to corresponding 453 * @param insn {@code non-null;} the original instruction 457 public static Dop dopFor(Insn insn) { 458 Rop rop = insn.getOpcode(); 497 RegisterSpec resultReg = insn.getResult(); 524 (CstFieldRef) ((ThrowingCstInsn) insn).getConstant(); 537 (CstFieldRef) ((ThrowingCstInsn) insn).getConstant(); 550 (CstFieldRef) ((ThrowingCstInsn) insn).getConstant() [all...] |
/external/webkit/Source/JavaScriptCore/assembler/ |
ARMAssembler.h | 731 static ARMWord* getLdrImmAddress(ARMWord* insn) 735 if ((*insn & 0x0f7f0000) != 0x051f0000) { 737 ASSERT((*insn & 0x012fff30) == 0x012fff30); 738 insn--; 742 ASSERT((*insn & 0x0f7f0000) == 0x051f0000); 744 ARMWord addr = reinterpret_cast<ARMWord>(insn) + DefaultPrefetching * sizeof(ARMWord); 745 if (*insn & DT_UP) 746 return reinterpret_cast<ARMWord*>(addr + (*insn & SDT_OFFSET_MASK)); 747 return reinterpret_cast<ARMWord*>(addr - (*insn & SDT_OFFSET_MASK)); 750 static ARMWord* getLdrImmAddressOnPool(ARMWord* insn, uint32_t* constPool 762 ARMWord* insn = reinterpret_cast<ARMWord*>(from); local 801 ARMWord* insn = reinterpret_cast<ARMWord*>(getAbsoluteJumpAddress(m_buffer.data(), from.m_offset)); local [all...] |
/bionic/libc/kernel/arch-mips/asm/ |
uaccess.h | 52 #define __get_user_asm(val, insn, addr) { long __gu_tmp; __asm__ __volatile__( "1: " insn " %1, %3 \n" "2: \n" " .section .fixup,\"ax\" \n" "3: li %0, %4 \n" " j 2b \n" " .previous \n" " .section __ex_table,\"a\" \n" " "__UA_ADDR "\t1b, 3b \n" " .previous \n" : "=r" (__gu_err), "=r" (__gu_tmp) : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); (val) = (__typeof__(*(addr))) __gu_tmp; } 57 #define __put_user_asm(insn, ptr) { __asm__ __volatile__( "1: " insn " %z2, %3 # __put_user_asm\n" "2: \n" " .section .fixup,\"ax\" \n" "3: li %0, %4 \n" " j 2b \n" " .previous \n" " .section __ex_table,\"a\" \n" " " __UA_ADDR " 1b, 3b \n" " .previous \n" : "=r" (__pu_err) : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), "i" (-EFAULT)); } 85 unsigned long insn; member in struct:exception_table_entry
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/development/ndk/platforms/android-9/arch-mips/include/asm/ |
uaccess.h | 52 #define __get_user_asm(val, insn, addr) { long __gu_tmp; __asm__ __volatile__( "1: " insn " %1, %3 \n" "2: \n" " .section .fixup,\"ax\" \n" "3: li %0, %4 \n" " j 2b \n" " .previous \n" " .section __ex_table,\"a\" \n" " "__UA_ADDR "\t1b, 3b \n" " .previous \n" : "=r" (__gu_err), "=r" (__gu_tmp) : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); (val) = (__typeof__(*(addr))) __gu_tmp; } 57 #define __put_user_asm(insn, ptr) { __asm__ __volatile__( "1: " insn " %z2, %3 # __put_user_asm\n" "2: \n" " .section .fixup,\"ax\" \n" "3: li %0, %4 \n" " j 2b \n" " .previous \n" " .section __ex_table,\"a\" \n" " " __UA_ADDR " 1b, 3b \n" " .previous \n" : "=r" (__pu_err) : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), "i" (-EFAULT)); } 85 unsigned long insn; member in struct:exception_table_entry
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/prebuilts/gcc/darwin-x86/mips/mipsel-linux-android-4.4.3/sysroot/usr/include/asm/ |
uaccess.h | 52 #define __get_user_asm(val, insn, addr) { long __gu_tmp; __asm__ __volatile__( "1: " insn " %1, %3 \n" "2: \n" " .section .fixup,\"ax\" \n" "3: li %0, %4 \n" " j 2b \n" " .previous \n" " .section __ex_table,\"a\" \n" " "__UA_ADDR "\t1b, 3b \n" " .previous \n" : "=r" (__gu_err), "=r" (__gu_tmp) : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); (val) = (__typeof__(*(addr))) __gu_tmp; } 57 #define __put_user_asm(insn, ptr) { __asm__ __volatile__( "1: " insn " %z2, %3 # __put_user_asm\n" "2: \n" " .section .fixup,\"ax\" \n" "3: li %0, %4 \n" " j 2b \n" " .previous \n" " .section __ex_table,\"a\" \n" " " __UA_ADDR " 1b, 3b \n" " .previous \n" : "=r" (__pu_err) : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), "i" (-EFAULT)); } 85 unsigned long insn; member in struct:exception_table_entry
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/prebuilts/gcc/linux-x86/mips/mipsel-linux-android-4.4.3/sysroot/usr/include/asm/ |
uaccess.h | 52 #define __get_user_asm(val, insn, addr) { long __gu_tmp; __asm__ __volatile__( "1: " insn " %1, %3 \n" "2: \n" " .section .fixup,\"ax\" \n" "3: li %0, %4 \n" " j 2b \n" " .previous \n" " .section __ex_table,\"a\" \n" " "__UA_ADDR "\t1b, 3b \n" " .previous \n" : "=r" (__gu_err), "=r" (__gu_tmp) : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); (val) = (__typeof__(*(addr))) __gu_tmp; } 57 #define __put_user_asm(insn, ptr) { __asm__ __volatile__( "1: " insn " %z2, %3 # __put_user_asm\n" "2: \n" " .section .fixup,\"ax\" \n" "3: li %0, %4 \n" " j 2b \n" " .previous \n" " .section __ex_table,\"a\" \n" " " __UA_ADDR " 1b, 3b \n" " .previous \n" : "=r" (__pu_err) : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), "i" (-EFAULT)); } 85 unsigned long insn; member in struct:exception_table_entry
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/external/qemu/ |
arm-dis.c | 87 unsigned long arch; /* Architecture defining this insn. */ 88 unsigned long value, mask; /* Recognise insn if (op&mask)==value. */ 89 const char *assembler; /* How to disassemble this insn. */ 94 unsigned long arch; /* Architecture defining this insn. */ 95 unsigned short value, mask; /* Recognise insn if (op&mask)==value. */ 96 const char *assembler; /* How to disassemble this insn. */ 111 %P print floating point precision in arithmetic insn 112 %Q print floating point precision in ldf/stf insn 1634 const struct opcode32 *insn; local 2223 const struct opcode32 *insn; local 2677 const struct opcode32 *insn; local 3037 const struct opcode16 *insn; local 3313 const struct opcode32 *insn; local 3793 unsigned int insn; local [all...] |
ppc-dis.c | 182 where the operand goes in the insn. */ 5249 unsigned long insn; local [all...] |
/prebuilts/gcc/darwin-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
target.def | 193 void, (FILE *stream, rtx insn), 199 the assembly for @var{insn} has been emitted, false if the hook should\ 473 /* Some target machines need to postscan each insn after it is output. */ 477 void, (FILE *file, rtx insn, rtx *opvec, int noperands), 510 /* Emit a machine-specific insn operand. */ 558 /* Given the current cost, COST, of an insn, INSN, calculate and 564 int, (rtx insn, rtx link, rtx dep_insn, int cost), NULL) 566 /* Adjust the priority of an insn as you see fit. Returns the new priority. */ 570 int, (rtx insn, int priority), NULL [all...] |
/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/ |
target.def | 193 void, (FILE *stream, rtx insn), 199 the assembly for @var{insn} has been emitted, false if the hook should\ 473 /* Some target machines need to postscan each insn after it is output. */ 477 void, (FILE *file, rtx insn, rtx *opvec, int noperands), 510 /* Emit a machine-specific insn operand. */ 558 /* Given the current cost, COST, of an insn, INSN, calculate and 564 int, (rtx insn, rtx link, rtx dep_insn, int cost), NULL) 566 /* Adjust the priority of an insn as you see fit. Returns the new priority. */ 570 int, (rtx insn, int priority), NULL [all...] |
/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
target.def | 193 void, (FILE *stream, rtx insn), 199 the assembly for @var{insn} has been emitted, false if the hook should\ 473 /* Some target machines need to postscan each insn after it is output. */ 477 void, (FILE *file, rtx insn, rtx *opvec, int noperands), 510 /* Emit a machine-specific insn operand. */ 558 /* Given the current cost, COST, of an insn, INSN, calculate and 564 int, (rtx insn, rtx link, rtx dep_insn, int cost), NULL) 566 /* Adjust the priority of an insn as you see fit. Returns the new priority. */ 570 int, (rtx insn, int priority), NULL [all...] |
/external/valgrind/main/memcheck/tests/amd64/ |
sse_memory.c | 133 #define TEST_INSN(res_mask,mem_size,insn) \ 135 Wrapper_RegReg(insn) \ 136 Wrapper_RegMem(insn) \ 138 void do_##insn ( void ) \ 146 r_r_##insn(&rargs); \ 147 showRR(#insn, &rargs, res_mask); \ 153 r_m_##insn(&margs,buf); \ 154 showRM(#insn, &margs, buf, mem_size, res_mask);\
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/sdk/emulator/qtools/ |
callstack.h | 259 uint32_t insn = 0; local 261 insn = mPrevEvent.insns[numInsns - 1]; 263 insn = insn_unwrap_thumb(insn); 264 op = decode_insn_thumb(insn); 266 op = Arm::decode(insn); 309 if (offset != 0 && ((op == OP_LDM && (insn & 0x8000)) 310 || (op == OP_THUMB_POP && (insn & 0x100)))) {
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/dalvik/dx/src/com/android/dx/ssa/back/ |
SsaToRop.java | 170 // Add moves in all the pred blocks for each phi insn. 197 public void visitPhiInsn(PhiInsn insn) { 198 RegisterSpecList sources = insn.getSources(); 199 RegisterSpec result = insn.getResult(); 205 insn.predBlockIndexForSourcesIndex(i)); 332 * Converts an insn list to rop form.
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/external/dexmaker/src/dx/java/com/android/dx/ssa/back/ |
SsaToRop.java | 170 // Add moves in all the pred blocks for each phi insn. 197 public void visitPhiInsn(PhiInsn insn) { 198 RegisterSpecList sources = insn.getSources(); 199 RegisterSpec result = insn.getResult(); 205 insn.predBlockIndexForSourcesIndex(i)); 332 * Converts an insn list to rop form.
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/external/kernel-headers/original/asm-arm/ |
processor.h | 33 union debug_insn insn; member in struct:debug_entry
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/external/kernel-headers/original/asm-mips/ |
uaccess.h | 244 #define __get_user_asm(val, insn, addr) \ 249 "1: " insn " %1, %3 \n" \ 338 #define __put_user_asm(insn, ptr) \ 341 "1: " insn " %z2, %3 # __put_user_asm\n" \ 846 unsigned long insn; member in struct:exception_table_entry
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/dalvik/vm/compiler/codegen/arm/ |
Assemble.cpp | 2624 unsigned int insn = *lr_masked; local [all...] |