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  /external/v8/test/mjsunit/regress/
regress-1099.js 30 // Test that LApplyArguments lithium instruction restores context after the call.
  /dalvik/vm/mterp/x86-atom/
footer.S 93 FINISH_RB %edx, %ecx # jump to next instruction
320 FFETCH_ADV 3, %edx # %edx<- next instruction hi; fetch, advance
325 FGETOP_JMP 3, %edx # jump to next instruction; getop, jmp
341 * Common code for handling a return instruction.
392 FFETCH_ADV 3, %eax # %ecx<- next instruction hi; fetch, advance
396 FGETOP_JMP 3, %eax # jump to next instruction; getop, jmp
401 * continue with whatever the next instruction now happens to be.
536 * values and start executing at the next instruction.
541 FINISH_A # jump to next instruction
OP_FILLED_NEW_ARRAY.S 31 * instruction.
151 FINISH 3 # jump to next instruction
  /external/valgrind/main/none/tests/arm/
v6intARM.c 8 /* test macros to generate and output the result of a single instruction */
9 #define TESTINST2(instruction, RMval, RD, RM, carryin) \
23 instruction ";" \
31 instruction, out, RMval, \
41 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \
52 instruction ";" \
60 instruction, out, RMval, RNval, \
70 #define TESTINST4(instruction, RMval, RNval, RSval, RD, RM, RN, RS, carryin) \
82 instruction ";" \
90 instruction, out, RMval, RNval, RSval,
    [all...]
neon128.c 42 /* test macros to generate and output the result of a single instruction */
51 #define TESTINSN_imm(instruction, QD, imm) \
57 instruction ", #" #imm "\n\t" \
64 instruction, out[3], out[2], out[1], out[0]); \
73 instruction ", #" #imm "\n\t" \
80 instruction, out[3], out[2], out[1], out[0]); \
83 #define TESTINSN_un(instruction, QD, QM, QMtype, QMval) \
90 instruction "\n\t" \
97 instruction, out[3], out[2], out[1], out[0], QMval); \
107 instruction "\n\t"
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  /external/libnfc-nxp/src/
phHciNfc_NfcIPMgmt.c 437 uint8_t instruction=0; local
443 /* Get the instruction bits from the Message Header */
444 instruction = (uint8_t) GET_BITS8( message->msg_header,
446 if (NXP_EVT_NFC_ACTIVATED == instruction)
639 uint8_t instruction=0; local
644 /* Get the instruction bits from the Message Header */
645 instruction = (uint8_t) GET_BITS8( message->msg_header,
647 if (NXP_EVT_NFC_ACTIVATED == instruction)
756 uint8_t instruction=0; local
763 /* Get the instruction bits from the Message Header *
    [all...]
phHciNfc_ISO15693.c 584 uint8_t instruction=0, local
591 /* Get the instruction bits from the Message Header */
592 instruction = (uint8_t) GET_BITS8( message->msg_header,
595 if ((EVT_TARGET_DISCOVERED == instruction)
phHciNfc_Jewel.c 657 uint8_t instruction=0, local
664 /* Get the instruction bits from the Message Header */
665 instruction = (uint8_t) GET_BITS8( message->msg_header,
668 if ((EVT_TARGET_DISCOVERED == instruction)
phHciNfc_RFReaderB.c 633 uint8_t instruction=0, local
640 /* Get the instruction bits from the Message Header */
641 instruction = (uint8_t) GET_BITS8( message->msg_header,
644 if ((EVT_TARGET_DISCOVERED == instruction)
    [all...]
phHciNfc_RFReaderA.c 824 uint8_t instruction=0, local
831 /* Get the instruction bits from the Message Header */
832 instruction = (uint8_t) GET_BITS8( message->msg_header,
835 HCI_DEBUG ("HCI : instruction : %02X\n", instruction);
838 if ((EVT_TARGET_DISCOVERED == instruction)
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  /external/chromium/sdch/open-vcdiff/src/
vcdecoder.cc 201 // Decodes a single ADD instruction, updating parent_->decoded_target_.
204 // Decodes a single RUN instruction, updating parent_->decoded_target_.
207 // Decodes a single COPY instruction, updating parent_->decoded_target_.
241 // Executes a single COPY or ADD instruction, appending data to
245 // Executes a single RUN instruction, appending data to
252 // by the number of instruction/size bytes parsed.
1211 VCDiffInstructionType instruction = local
    [all...]
  /external/proguard/src/proguard/shrink/
UsageMarker.java 31 import proguard.classfile.instruction.*;
32 import proguard.classfile.instruction.visitor.InstructionVisitor;
834 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
  /cts/tools/dasm/src/dasm/
parser.cup 98 field_spec, fields, instruction, implements, implements_list, implements_spec,
558 instruction
575 Int:label COLON instruction
675 instruction ::=
681 // Various patterns of instruction:
682 // instruction [<pattern>]
  /dalvik/vm/compiler/template/armv5te/
TEMPLATE_INVOKE_METHOD_NATIVE.S 77 @ continue executing the next instruction through the interpreter
footer.S 65 @ continue executing the next instruction through the interpreter
  /external/llvm/
README.android 40 ==> * 96a74c5 - remove support for a bunch of obsolete instruction encodings and other backward compatibility hacks. (13 days ago) <Chris Lattner>
  /external/llvm/test/MC/ARM/
thumb2-mclass.s 6 @ These tests test instruction encodings specific to v7m & v7m (FeatureMClass).
  /external/v8/test/mjsunit/compiler/
regress-gap.js 28 // Regression test that stresses the register allocator gap instruction.
  /external/webkit/LayoutTests/dom/html/level1/core/
documentinvalidcharacterexceptioncreatepi1.js 79 Creating a processing instruction with an empty target should cause an INVALID_CHARACTER_ERR.
  /external/webkit/LayoutTests/dom/xhtml/level1/core/
documentinvalidcharacterexceptioncreatepi1.js 79 Creating a processing instruction with an empty target should cause an INVALID_CHARACTER_ERR.
  /bionic/libc/arch-x86/bionic/
crtbegin_dynamic.S 46 # can't hard-code it in the adr pseudo instruction
crtbegin_static.S 46 # can't hard-code it in the adr pseudo instruction
  /external/proguard/src/proguard/classfile/visitor/
ClassPrinter.java 32 import proguard.classfile.instruction.*;
33 import proguard.classfile.instruction.visitor.InstructionVisitor;
615 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction)
617 println(instruction.toString(offset));
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  /external/proguard/src/proguard/evaluation/
BasicInvocationUnit.java 27 import proguard.classfile.instruction.*;
  /external/valgrind/main/exp-bbv/tests/ppc32-linux/
ll.S 52 # saves one instruction on any future load from memory

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