| /external/llvm/test/MC/ELF/ |
| relax-arith.s | 7 // CHECK: 'imul'
9 .section imul
10 imul $foo, %bx, %bx
11 imul $foo, bar, %bx
12 imul $foo, %ebx, %ebx
13 imul $foo, bar, %ebx
14 imul $foo, %rbx, %rbx
15 imul $foo, bar, %rbx
|
| /external/llvm/test/CodeGen/X86/ |
| imul-lea-2.ll | 3 ; RUN: llc < %s -march=x86-64 | not grep imul
|
| memset-2.ll | 37 ; CHECK-NOT: imul
|
| 2007-11-07-MulBy4.ll | 1 ; RUN: llc < %s -march=x86 | not grep imul
|
| loop-strength-reduce7.ll | 1 ; RUN: llc < %s -march=x86 | not grep imul
|
| /external/flac/libFLAC/ia32/ |
| lpc_asm.nasm | 783 imul eax, edx
813 imul eax, [esi + 4 * ecx]
845 imul ecx, [esi - 128]
848 imul ecx, [esi - 124]
851 imul ecx, [esi - 120]
854 imul ecx, [esi - 116]
857 imul ecx, [esi - 112]
860 imul ecx, [esi - 108]
863 imul ecx, [esi - 104]
866 imul ecx, [esi - 100
[all...] |
| /dalvik/dx/tests/102-verify-nonwide-math/ |
| op_imul.j | 24 imul
|
| run | 43 oneop imul
|
| expected.txt | 32 imul: expected failure occurred
|
| /dalvik/vm/mterp/x86-atom/ |
| OP_MUL_INT.S | 20 %include "x86-atom/binop.S" {"instr":"imul %edx, %ecx"}
|
| OP_MUL_INT_2ADDR.S | 20 %include "x86-atom/binop2addr.S" {"instr":"imul %edx, %ecx"}
|
| OP_MUL_INT_LIT16.S | 20 %include "x86-atom/binopLit16.S" {"instr":"imul %edx, %ecx"}
|
| OP_MUL_INT_LIT8.S | 20 %include "x86-atom/binopLit8.S" {"instr":"imul %edx, %ecx"}
|
| /dalvik/vm/mterp/x86/ |
| OP_MUL_LONG_2ADDR.S | 7 * is used by imul. We'll also spill rINST (ebx),
|
| /external/aac/libFDK/include/x86/ |
| fixmul_x86.h | 114 imul b
127 imul b
155 asm( "imul %2;\n"
168 asm ( "imul %2;"
|
| /external/srec/srec/cfront/ |
| himul32.h | 80 // The x86 imul instruction, given a single 32-bit operand, computes
83 // EAX, then IMUL, then take the high 32 bits (in EDX) and move them
89 imul factor2
|
| /external/llvm/lib/Target/X86/ |
| X86InstrArithmetic.td | 100 def IMUL8r : I<0xF6, MRM5r, (outs), (ins GR8:$src), "imul{b}\t$src", [],
103 def IMUL16r : I<0xF7, MRM5r, (outs), (ins GR16:$src), "imul{w}\t$src", [],
106 def IMUL32r : I<0xF7, MRM5r, (outs), (ins GR32:$src), "imul{l}\t$src", [],
109 def IMUL64r : RI<0xF7, MRM5r, (outs), (ins GR64:$src), "imul{q}\t$src", [],
115 "imul{b}\t$src", [], IIC_IMUL8>; // AL,AH = AL*[mem8]
118 "imul{w}\t$src", [], IIC_IMUL16_MEM>, OpSize;
122 "imul{l}\t$src", [], IIC_IMUL32_MEM>; // EAX,EDX = EAX*[mem32]
125 "imul{q}\t$src", [], IIC_IMUL64>; // RAX,RDX = RAX*[mem64]
133 let isCommutable = 1 in { // X = IMUL Y, Z --> X = IMUL Z,
[all...] |
| X86Schedule.td | 23 // imul by al, ax, eax, tax
30 // imul reg by reg|mem
37 // imul reg = reg/mem * imm
|
| X86ScheduleAtom.td | 48 // imul by al, ax, eax, rax
55 // imul reg by reg|mem
62 // imul reg = reg/mem * imm
|
| /external/v8/test/cctest/ |
| test-disasm-ia32.cc | 125 __ imul(edx, ecx);
180 __ imul(edx, Operand(ebx, ecx, times_4, 10000));
181 __ imul(edx, ecx, 12);
182 __ imul(edx, ecx, 1000);
236 __ imul(edx, ecx, 12);
237 __ imul(edx, ecx, 1000);
|
| test-disasm-x64.cc | 119 __ imul(rdx, rcx);
169 __ imul(rdx, Operand(rbx, rcx, times_4, 10000));
170 __ imul(rdx, rcx, Immediate(12));
171 __ imul(rdx, rcx, Immediate(1000));
222 __ imul(rdx, rcx, Immediate(12));
223 __ imul(rdx, rcx, Immediate(1000));
|
| /external/javassist/src/main/javassist/bytecode/ |
| Mnemonic.java | 142 "imul", /* 104*/
|
| /external/quake/quake/src/QW/client/ |
| d_spr8.asm | 342 imul ds:dword ptr[_d_zrowbytes]
436 imul eax,ds:dword ptr[_cachewidth]
478 imul eax,ebx
684 imul ds:dword ptr[reciprocal_table-8+ecx*4]
687 imul ds:dword ptr[reciprocal_table-8+ecx*4]
697 imul edx,ebx
|
| d_draw.asm | 412 imul eax,edx
457 imul eax,ebx
597 imul ds:dword ptr[reciprocal_table-8+ecx*4]
600 imul ds:dword ptr[reciprocal_table-8+ecx*4]
609 imul edx,ebx
783 imul ecx,ds:dword ptr[_d_zrowbytes]
870 imul ecx,ds:dword ptr[_d_zrowbytes]
|
| /external/proguard/src/proguard/classfile/instruction/ |
| Instruction.java | 141 false, // imul
350 2, // imul
559 1, // imul
|
