| /external/llvm/test/MC/Disassembler/ARM/ |
| invalid-IT-CC15.txt | 15 # vldr d19, [pc, #388]
18 # vldr<und> d16, [pc, #384]
|
| fp-encoding.txt | 155 # CHECK: vldr d17, [r0]
159 # CHECK: vldr d1, [r2, #32]
160 # CHECK: vldr d1, [r2, #-32]
163 # CHECK: vldr d2, [r3]
166 # CHECK: vldr d3, [pc]
169 # CHECK: vldr s13, [r0]
173 # CHECK: vldr s1, [r2, #32]
174 # CHECK: vldr s1, [r2, #-32]
177 # CHECK: vldr s2, [r3]
180 # CHECK: vldr s5, [pc
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| neon_ld1.ll | 4 ; CHECK: vldr d
5 ; CHECK: vldr d
19 ; CHECK: vldr d
20 ; CHECK: vldr d
|
| fpmem.ll | 11 ; CHECK: vldr{{.*}}[
19 ; CHECK: vldr{{.*}}, #4]
28 ; CHECK: vldr{{.*}}, #-4]
|
| 2010-05-21-BuildVector.ll | 13 ;CHECK: vldr s
20 ;CHECK: vldr s
27 ;CHECK: vldr s
34 ;CHECK: vldr s
|
| fpcmp-opt.ll | 9 ; CHECK: vldr [[S0:s[0-9]+]],
10 ; CHECK: vldr [[S1:s[0-9]+]],
33 ; CHECK-NOT: vldr
59 ; CHECK-NOT: vldr
|
| vbsl-constant.ll | 5 ;CHECK: vldr
6 ;CHECK: vldr
19 ;CHECK: vldr
20 ;CHECK: vldr
33 ;CHECK: vldr
34 ;CHECK: vldr
47 ;CHECK: vldr
48 ;CHECK: vldr
49 ;CHECK: vldr
|
| dagcombine-anyexttozeroext.ll | 5 ; CHECK: vldr
23 ; CHECK: vldr
|
| vector-extend-narrow.ll | 5 ; CHECK: vldr
23 ; CHECK: vldr
50 ; CHECK: vldr
|
| 2009-09-24-spill-align.ll | 9 ; CHECK: vldr
|
| fast-isel-deadcode.ll | 12 ; THUMB-NOT: vldr
|
| subreg-remat.ll | 15 ; CHECK: vldr s0, LCPI
20 ; CHECK: vldr [[D16:d[0-9]+]],
40 ; CHECK: vldr s0, LCPI
45 ; CHECK: vldr [[S0:s[0-9]+]], LCPI
|
| fp.ll | 45 ;CHECK: vldr
|
| widen-vmovs.ll | 6 ; CHECK: vldr s
|
| fast-isel-cmp-imm.ll | 29 ; ARM: vldr
31 ; THUMB: vldr
66 ; ARM: vldr
68 ; THUMB: vldr
|
| vector-DAGCombine.ll | 83 ; CHECK: vldr
92 ; CHECK: vldr
|
| crash-greedy.ll | 52 ; CHECK: vldr
|
| /external/llvm/test/MC/ARM/ |
| simple-fp-encoding.s | 202 @ CHECK: vldr d17, [r0] @ encoding: [0x00,0x1b,0xd0,0xed]
203 @ CHECK: vldr s0, [lr] @ encoding: [0x00,0x0a,0x9e,0xed]
204 @ CHECK: vldr d0, [lr] @ encoding: [0x00,0x0b,0x9e,0xed]
206 vldr.64 d17, [r0]
207 vldr.i32 s0, [lr]
208 vldr.d d0, [lr]
210 @ CHECK: vldr d1, [r2, #32] @ encoding: [0x08,0x1b,0x92,0xed]
211 @ CHECK: vldr d1, [r2, #-32] @ encoding: [0x08,0x1b,0x12,0xed]
212 vldr.64 d1, [r2, #32]
213 vldr.f64 d1, [r2, #-32
[all...] |
| /external/v8/test/cctest/ |
| test-disasm-arm.cc | 478 COMPARE(vldr(s0, r0, 0),
479 "ed900a00 vldr s0, [r0 + 4*0]");
480 COMPARE(vldr(s1, r1, 4),
481 "edd10a01 vldr s1, [r1 + 4*1]");
482 COMPARE(vldr(s15, r4, 16),
483 "edd47a04 vldr s15, [r4 + 4*4]");
484 COMPARE(vldr(s16, r5, 20),
485 "ed958a05 vldr s16, [r5 + 4*5]");
486 COMPARE(vldr(s31, r10, 1020),
487 "eddafaff vldr s31, [r10 + 4*255]")
[all...] |
| test-assembler-arm.cc | 257 __ vldr(d6, r4, OFFSET_OF(T, a));
258 __ vldr(d7, r4, OFFSET_OF(T, b));
267 __ vldr(s0, r4, OFFSET_OF(T, x));
268 __ vldr(s31, r4, OFFSET_OF(T, y));
296 __ vldr(d1, r4, OFFSET_OF(T, g));
299 __ vldr(d2, r4, OFFSET_OF(T, h));
304 __ vldr(d1, r4, OFFSET_OF(T, m));
307 __ vldr(d1, r4, OFFSET_OF(T, n));
|
| /external/v8/src/arm/ |
| lithium-gap-resolver-arm.cc | 176 __ vldr(kScratchDoubleReg, cgen_->ToMemOperand(source));
235 __ vldr(kScratchDoubleReg.low(), source_operand);
281 __ vldr(cgen_->ToDoubleRegister(destination), source_operand);
297 __ vldr(kScratchDoubleReg, source_operand);
|
| /external/llvm/test/CodeGen/Thumb2/ |
| aligned-spill.ll | 66 ; NEON: vldr d14,
91 ; NEON: vldr d10, [{{.*}}, #16]
|
| 2010-06-14-NEONCoalescer.ll | 26 ; CHECK: vldr [[LDR:d.*]],
|
| /external/valgrind/main/none/tests/arm/ |
| vfp.stdout.exp | [all...] |
| vfp.c | [all...] |
