1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 2 3 define void @vst4i8(i8* %A, <8 x i8>* %B) nounwind { 4 ;CHECK: vst4i8: 5 ;Check the alignment value. Max for this instruction is 256 bits: 6 ;CHECK: vst4.8 {d16, d17, d18, d19}, [r0, :64] 7 %tmp1 = load <8 x i8>* %B 8 call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 8) 9 ret void 10 } 11 12 ;Check for a post-increment updating store with register increment. 13 define void @vst4i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind { 14 ;CHECK: vst4i8_update: 15 ;CHECK: vst4.8 {d16, d17, d18, d19}, [r1, :128], r2 16 %A = load i8** %ptr 17 %tmp1 = load <8 x i8>* %B 18 call void @llvm.arm.neon.vst4.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 16) 19 %tmp2 = getelementptr i8* %A, i32 %inc 20 store i8* %tmp2, i8** %ptr 21 ret void 22 } 23 24 define void @vst4i16(i16* %A, <4 x i16>* %B) nounwind { 25 ;CHECK: vst4i16: 26 ;Check the alignment value. Max for this instruction is 256 bits: 27 ;CHECK: vst4.16 {d16, d17, d18, d19}, [r0, :128] 28 %tmp0 = bitcast i16* %A to i8* 29 %tmp1 = load <4 x i16>* %B 30 call void @llvm.arm.neon.vst4.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 16) 31 ret void 32 } 33 34 define void @vst4i32(i32* %A, <2 x i32>* %B) nounwind { 35 ;CHECK: vst4i32: 36 ;Check the alignment value. Max for this instruction is 256 bits: 37 ;CHECK: vst4.32 {d16, d17, d18, d19}, [r0, :256] 38 %tmp0 = bitcast i32* %A to i8* 39 %tmp1 = load <2 x i32>* %B 40 call void @llvm.arm.neon.vst4.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 32) 41 ret void 42 } 43 44 define void @vst4f(float* %A, <2 x float>* %B) nounwind { 45 ;CHECK: vst4f: 46 ;CHECK: vst4.32 47 %tmp0 = bitcast float* %A to i8* 48 %tmp1 = load <2 x float>* %B 49 call void @llvm.arm.neon.vst4.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1) 50 ret void 51 } 52 53 define void @vst4i64(i64* %A, <1 x i64>* %B) nounwind { 54 ;CHECK: vst4i64: 55 ;Check the alignment value. Max for this instruction is 256 bits: 56 ;CHECK: vst1.64 {d16, d17, d18, d19}, [r0, :256] 57 %tmp0 = bitcast i64* %A to i8* 58 %tmp1 = load <1 x i64>* %B 59 call void @llvm.arm.neon.vst4.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 64) 60 ret void 61 } 62 63 define void @vst4Qi8(i8* %A, <16 x i8>* %B) nounwind { 64 ;CHECK: vst4Qi8: 65 ;Check the alignment value. Max for this instruction is 256 bits: 66 ;CHECK: vst4.8 {d16, d18, d20, d22}, [r0, :256]! 67 ;CHECK: vst4.8 {d17, d19, d21, d23}, [r0, :256] 68 %tmp1 = load <16 x i8>* %B 69 call void @llvm.arm.neon.vst4.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 64) 70 ret void 71 } 72 73 define void @vst4Qi16(i16* %A, <8 x i16>* %B) nounwind { 74 ;CHECK: vst4Qi16: 75 ;Check for no alignment specifier. 76 ;CHECK: vst4.16 {d16, d18, d20, d22}, [r0]! 77 ;CHECK: vst4.16 {d17, d19, d21, d23}, [r0] 78 %tmp0 = bitcast i16* %A to i8* 79 %tmp1 = load <8 x i16>* %B 80 call void @llvm.arm.neon.vst4.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1) 81 ret void 82 } 83 84 define void @vst4Qi32(i32* %A, <4 x i32>* %B) nounwind { 85 ;CHECK: vst4Qi32: 86 ;CHECK: vst4.32 87 ;CHECK: vst4.32 88 %tmp0 = bitcast i32* %A to i8* 89 %tmp1 = load <4 x i32>* %B 90 call void @llvm.arm.neon.vst4.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1) 91 ret void 92 } 93 94 define void @vst4Qf(float* %A, <4 x float>* %B) nounwind { 95 ;CHECK: vst4Qf: 96 ;CHECK: vst4.32 97 ;CHECK: vst4.32 98 %tmp0 = bitcast float* %A to i8* 99 %tmp1 = load <4 x float>* %B 100 call void @llvm.arm.neon.vst4.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) 101 ret void 102 } 103 104 ;Check for a post-increment updating store. 105 define void @vst4Qf_update(float** %ptr, <4 x float>* %B) nounwind { 106 ;CHECK: vst4Qf_update: 107 ;CHECK: vst4.32 {d16, d18, d20, d22}, [r1]! 108 ;CHECK: vst4.32 {d17, d19, d21, d23}, [r1]! 109 %A = load float** %ptr 110 %tmp0 = bitcast float* %A to i8* 111 %tmp1 = load <4 x float>* %B 112 call void @llvm.arm.neon.vst4.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1) 113 %tmp2 = getelementptr float* %A, i32 16 114 store float* %tmp2, float** %ptr 115 ret void 116 } 117 118 declare void @llvm.arm.neon.vst4.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind 119 declare void @llvm.arm.neon.vst4.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind 120 declare void @llvm.arm.neon.vst4.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind 121 declare void @llvm.arm.neon.vst4.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32) nounwind 122 declare void @llvm.arm.neon.vst4.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i32) nounwind 123 124 declare void @llvm.arm.neon.vst4.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i32) nounwind 125 declare void @llvm.arm.neon.vst4.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind 126 declare void @llvm.arm.neon.vst4.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind 127 declare void @llvm.arm.neon.vst4.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32) nounwind 128
