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Lines Matching refs:rlSrc2

105                        RegLocation rlSrc1, RegLocation rlSrc2)
109     loadValueDirectWideFixed(cUnit, rlSrc2, r_ARG2, r_ARG3);
122                             RegLocation rlSrc2, int sltuSrc1, int sltuSrc2)
125     newLIR3(cUnit, opc, rlDest.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
127     newLIR3(cUnit, opc, rlDest.highReg, rlSrc1.highReg, rlSrc2.highReg);
134                          RegLocation rlSrc1, RegLocation rlSrc2)
139     if (partialOverlap(rlSrc1.sRegLow,rlSrc2.sRegLow) ||
141         partialOverlap(rlSrc2.sRegLow,rlDest.sRegLow)) {
146         rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
148             opRegRegReg(cUnit, firstOp, rlResult.lowReg, rlResult.lowReg, rlSrc2.lowReg);
149             opRegRegReg(cUnit, secondOp, rlResult.highReg, rlResult.highReg, rlSrc2.highReg);
151             withCarryHelper(cUnit, kMipsAddu, rlResult, rlResult, rlSrc2,
152                             rlResult.lowReg, rlSrc2.lowReg);
156             withCarryHelper(cUnit, kMipsSubu, rlResult, rlResult, rlSrc2,
161     } else if (rlDest.sRegLow == rlSrc2.sRegLow) {
177         rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
180             opRegRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
181             opRegRegReg(cUnit, secondOp, rlResult.highReg, rlSrc1.highReg, rlSrc2.highReg);
183             withCarryHelper(cUnit, kMipsAddu, rlResult, rlSrc1, rlSrc2,
186             withCarryHelper(cUnit, kMipsSubu, rlResult, rlSrc1, rlSrc2,
236                        RegLocation rlSrc1, RegLocation rlSrc2)
240     loadValueDirectWideFixed(cUnit, rlSrc2, r_ARG2, r_ARG3);
288     RegLocation rlSrc2 = dvmCompilerGetSrc(cUnit, mir, 1);
290     int reg1 = loadValue(cUnit, rlSrc2, kCoreReg).lowReg;