Lines Matching full:next
11 // CHECK-NEXT: [[T2:%.*]] = load i32* @uk
12 // CHECK-NEXT: [[T3:%.*]] = add i32 [[T1]], [[T2]]
13 // CHECK-NEXT: store i32 [[T3]], i32* @ui
17 // CHECK-NEXT: [[T2:%.*]] = load i32* @k
18 // CHECK-NEXT: [[T3:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[T1]], i32 [[T2]])
19 // CHECK-NEXT: [[T4:%.*]] = extractvalue { i32, i1 } [[T3]], 0
20 // CHECK-NEXT: [[T5:%.*]] = extractvalue { i32, i1 } [[T3]], 1
21 // CHECK-NEXT: [[T6:%.*]] = xor i1 [[T5]], true
22 // CHECK-NEXT: br i1 [[T6]]
33 // CHECK-NEXT: [[T2:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[T1]], i32 1)
34 // CHECK-NEXT: [[T3:%.*]] = extractvalue { i32, i1 } [[T2]], 0
35 // CHECK-NEXT: [[T4:%.*]] = extractvalue { i32, i1 } [[T2]], 1
36 // CHECK-NEXT: [[T5:%.*]] = xor i1 [[T4]], true
37 // CHECK-NEXT: br i1 [[T5]]
47 // CHECK-NEXT: [[T2:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[T1]], i32 1)
48 // CHECK-NEXT: [[T3:%.*]] = extractvalue { i32, i1 } [[T2]], 0
49 // CHECK-NEXT: [[T4:%.*]] = extractvalue { i32, i1 } [[T2]], 1
50 // CHECK-NEXT: [[T5:%.*]] = xor i1 [[T4]], true
51 // CHECK-NEXT: br i1 [[T5]]
