Lines Matching full:next
84 // CHECK-NEXT: store [[A]]* [[THIS:%[a-zA-z0-9.]+]], [[A]]** [[THISADDR]]
85 // CHECK-NEXT: [[THIS1:%[a-zA-z0-9.]+]] = load [[A]]** [[THISADDR]]
86 // CHECK-NEXT: ret void
91 // CHECK-NEXT: [[XADDR:%[a-zA-z0-9.]+]] = alloca i32
92 // CHECK-NEXT: store [[A]]* [[THIS:%[a-zA-z0-9.]+]], [[A]]** [[THISADDR]]
93 // CHECK-NEXT: store i32 [[X:%[a-zA-z0-9.]+]], i32* [[XADDR]]
94 // CHECK-NEXT: [[THIS1:%[a-zA-z0-9.]+]] = load [[A]]** [[THISADDR]]
95 // CHECK-NEXT: {{getelementptr inbounds.*i32 0, i32 0}}
96 // CHECK-NEXT: {{getelementptr inbounds.*i32 0, i32 0}}
97 // CHECK-NEXT: {{getelementptr inbounds.*i32 0, i32 0}}
98 // CHECK-NEXT: [[TMP:%[a-zA-z0-9.]+]] = load i32* [[XADDR]]
99 // CHECK-NEXT: store i32 [[TMP]]
100 // CHECK-NEXT: ret void
105 // CHECK-NEXT: [[XADDR:%[a-zA-z0-9.]+]] = alloca i64
106 // CHECK-NEXT: store [[A]]* [[THIS:%[a-zA-z0-9.]+]], [[A]]** [[THISADDR]]
107 // CHECK-NEXT: store i64 [[X:%[a-zA-z0-9.]+]], i64* [[XADDR]]
108 // CHECK-NEXT: [[THIS1:%[a-zA-z0-9.]+]] = load [[A]]** [[THISADDR]]
109 // CHECK-NEXT: {{getelementptr inbounds.*i32 0, i32 0}}
110 // CHECK-NEXT: {{getelementptr inbounds.*i32 0, i32 1}}
111 // CHECK-NEXT: {{getelementptr inbounds.*i32 0, i32 0}}
112 // CHECK-NEXT: [[TMP:%[a-zA-z0-9.]+]] = load i64* [[XADDR]]
113 // CHECK-NEXT: [[CONV:%[a-zA-z0-9.]+]] = trunc i64 [[TMP]] to i32
114 // CHECK-NEXT: store i32 [[CONV]]
115 // CHECK-NEXT: ret void
135 // CHECK-NEXT: [[UNION:%.*]] = getelementptr inbounds {{.*}} [[THIS]], i32 0, i32 0
136 // CHECK-NEXT: [[STRUCT:%.*]] = bitcast {{.*}}* [[UNION]] to
137 // CHECK-NEXT: [[CALLBACK:%.*]] = getelementptr inbounds {{.*}} [[STRUCT]], i32 0, i32 0
139 // CHECK-NEXT: [[UNION:%.*]] = getelementptr inbounds {{.*}} [[THIS]], i32 0, i32 0
140 // CHECK-NEXT: [[STRUCT:%.*]] = bitcast {{.*}}* [[UNION]] to
141 // CHECK-NEXT: [[CVALUE:%.*]] = getelementptr inbounds {{.*}} [[STRUCT]], i32 0, i32 1
142 // CHECK-NEXT: store i8* null, i8** [[CVALUE]]
