Lines Matching refs:MI
49 bool LowerSubregToReg(MachineInstr *MI);
50 bool LowerCopy(MachineInstr *MI);
52 void TransferDeadFlag(MachineInstr *MI, unsigned DstReg,
54 void TransferImplicitDefs(MachineInstr *MI);
64 /// TransferDeadFlag - MI is a pseudo-instruction with DstReg dead,
68 ExpandPostRA::TransferDeadFlag(MachineInstr *MI, unsigned DstReg,
71 prior(MachineBasicBlock::iterator(MI)); ; --MII) {
74 assert(MII != MI->getParent()->begin() &&
79 /// TransferImplicitDefs - MI is a pseudo-instruction, and the lowered
81 /// operands from MI to the replacement instruction.
83 ExpandPostRA::TransferImplicitDefs(MachineInstr *MI) {
84 MachineBasicBlock::iterator CopyMI = MI;
87 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
88 MachineOperand &MO = MI->getOperand(i);
95 bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
96 MachineBasicBlock *MBB = MI->getParent();
97 assert((MI->getOperand(0).isReg() && MI->getOperand(0).isDef()) &&
98 MI->getOperand(1).isImm() &&
99 (MI->getOperand(2).isReg() && MI->getOperand(2).isUse()) &&
100 MI->getOperand(3).isImm() && "Invalid subreg_to_reg");
102 unsigned DstReg = MI->getOperand(0).getReg();
103 unsigned InsReg = MI->getOperand(2).getReg();
104 assert(!MI->getOperand(2).getSubReg() && "SubIdx on physreg?");
105 unsigned SubIdx = MI->getOperand(3).getImm();
115 DEBUG(dbgs() << "subreg: CONVERTING: " << *MI);
123 MI->setDesc(TII->get(TargetOpcode::KILL));
124 MI->RemoveOperand(3); // SubIdx
125 MI->RemoveOperand(1); // Imm
126 DEBUG(dbgs() << "subreg: replace by: " << *MI);
131 TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
132 MI->getOperand(2).isKill());
135 MachineBasicBlock::iterator CopyMI = MI;
140 if (MI->getOperand(0).isDead())
141 TransferDeadFlag(MI, DstSubReg, TRI);
146 MBB->erase(MI);
150 bool ExpandPostRA::LowerCopy(MachineInstr *MI) {
151 MachineOperand &DstMO = MI->getOperand(0);
152 MachineOperand &SrcMO = MI->getOperand(1);
155 DEBUG(dbgs() << "identity copy: " << *MI);
158 if (DstMO.isDead() || SrcMO.isUndef() || MI->getNumOperands() > 2) {
161 MI->setDesc(TII->get(TargetOpcode::KILL));
162 DEBUG(dbgs() << "replaced by: " << *MI);
166 MI->eraseFromParent();
170 DEBUG(dbgs() << "real copy: " << *MI);
171 TII->copyPhysReg(*MI->getParent(), MI, MI->getDebugLoc(),
175 TransferDeadFlag(MI, DstMO.getReg(), TRI);
176 if (MI->getNumOperands() > 2)
177 TransferImplicitDefs(MI);
179 MachineBasicBlock::iterator dMI = MI;
182 MI->eraseFromParent();
200 for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
201 mi != me;) {
202 MachineInstr *MI = mi;
203 // Advance iterator here because MI may be erased.
204 ++mi;
207 if (!MI->isPseudo())
211 if (TII->expandPostRAPseudo(MI)) {
217 switch (MI->getOpcode()) {
219 MadeChange |= LowerSubregToReg(MI);
222 MadeChange |= LowerCopy(MI);
