Lines Matching refs:NVT
266 EVT NVT = Op.getValueType();
269 unsigned DiffBits = NVT.getSizeInBits() - OVT.getSizeInBits();
270 return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op),
314 EVT NVT = Op.getValueType();
315 Op = DAG.getNode(N->getOpcode(), dl, NVT, Op);
317 return DAG.getNode(ISD::SUB, dl, NVT, Op,
318 DAG.getConstant(NVT.getSizeInBits() -
319 OVT.getSizeInBits(), NVT));
331 EVT NVT = Op.getValueType();
337 APInt TopBit(NVT.getSizeInBits(), 0);
339 Op = DAG.getNode(ISD::OR, dl, NVT, Op, DAG.getConstant(TopBit, NVT));
341 return DAG.getNode(N->getOpcode(), dl, NVT, Op);
346 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
347 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NVT, N->getOperand(0),
352 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
361 !TLI.isOperationLegal(ISD::FP_TO_UINT, NVT) &&
362 TLI.isOperationLegalOrCustom(ISD::FP_TO_SINT, NVT))
365 SDValue Res = DAG.getNode(NewOpc, dl, NVT, N->getOperand(0));
371 ISD::AssertZext : ISD::AssertSext, dl, NVT, Res,
376 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
379 NVT, N->getOperand(0));
382 NVT, Res, DAG.getValueType(N->getValueType(0)));
386 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
392 assert(Res.getValueType().bitsLE(NVT) && "Extension doesn't make sense!");
396 if (NVT == Res.getValueType()) {
399 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NVT, Res,
410 return DAG.getNode(N->getOpcode(), dl, NVT, N->getOperand(0));
415 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
419 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(),
433 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(1));
434 EVT ValueVTs[] = { N->getValueType(0), NVT };
455 EVT NVT = LHS.getValueType();
460 SDValue Res = DAG.getNode(Opcode, dl, NVT, LHS, RHS);
464 SDValue Ofl = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NVT, Res,
513 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
516 // otherwise just use the promoted result type (NVT).
518 SVT = NVT;
528 assert(NVT.bitsLE(SVT) && "Integer type overpromoted?");
530 return DAG.getNode(ISD::TRUNCATE, dl, NVT, SetCC);
565 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
567 return DAG.getNode(ISD::SRL, N->getDebugLoc(), NVT, Res, N->getOperand(1));
571 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
589 assert(NumElts == NVT.getVectorNumElements() &&
597 EVT HalfNVT = EVT::getVectorVT(*DAG.getContext(), NVT.getScalarType(),
602 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, EOp1, EOp2);
605 // Truncate to NVT instead of VT
606 return DAG.getNode(ISD::TRUNCATE, dl, NVT, Res);
618 EVT NVT = LHS.getValueType();
623 SDValue Res = DAG.getNode(Opcode, dl, NVT, LHS, RHS);
714 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
715 SDValue Res = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Parts[0]);
717 SDValue Part = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Parts[i]);
719 Part = DAG.getNode(ISD::SHL, dl, NVT, Part,
722 Res = DAG.getNode(ISD::OR, dl, NVT, Res, Part);
1264 EVT NVT = InL.getValueType();
1266 unsigned NVTBits = NVT.getSizeInBits();
1271 Lo = Hi = DAG.getConstant(0, NVT);
1273 Lo = DAG.getConstant(0, NVT);
1275 NVT, InL, DAG.getConstant(Amt-NVTBits, ShTy));
1277 Lo = DAG.getConstant(0, NVT);
1281 TLI.getTypeToExpandTo(*DAG.getContext(), NVT))) {
1283 SDVTList VTList = DAG.getVTList(NVT, MVT::Glue);
1289 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, ShTy));
1290 Hi = DAG.getNode(ISD::OR, DL, NVT,
1291 DAG.getNode(ISD::SHL, DL, NVT, InH,
1293 DAG.getNode(ISD::SRL, DL, NVT, InL,
1301 Lo = DAG.getConstant(0, NVT);
1302 Hi = DAG.getConstant(0, NVT);
1305 NVT, InH, DAG.getConstant(Amt-NVTBits,ShTy));
1306 Hi = DAG.getConstant(0, NVT);
1309 Hi = DAG.getConstant(0, NVT);
1311 Lo = DAG.getNode(ISD::OR, DL, NVT,
1312 DAG.getNode(ISD::SRL, DL, NVT, InL,
1314 DAG.getNode(ISD::SHL, DL, NVT, InH,
1316 Hi = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt, ShTy));
1323 Hi = Lo = DAG.getNode(ISD::SRA, DL, NVT, InH,
1326 Lo = DAG.getNode(ISD::SRA, DL, NVT, InH,
1328 Hi = DAG.getNode(ISD::SRA, DL, NVT, InH,
1332 Hi = DAG.getNode(ISD::SRA, DL, NVT, InH,
1335 Lo = DAG.getNode(ISD::OR, DL, NVT,
1336 DAG.getNode(ISD::SRL, DL, NVT, InL,
1338 DAG.getNode(ISD::SHL, DL, NVT, InH,
1340 Hi = DAG.getNode(ISD::SRA, DL, NVT, InH, DAG.getConstant(Amt, ShTy));
1351 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1354 unsigned NVTBits = NVT.getScalarType().getSizeInBits();
1381 Lo = DAG.getConstant(0, NVT); // Low part is zero.
1382 Hi = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); // High part from Lo part.
1385 Hi = DAG.getConstant(0, NVT); // Hi part is zero.
1386 Lo = DAG.getNode(ISD::SRL, dl, NVT, InH, Amt); // Lo part from Hi part.
1389 Hi = DAG.getNode(ISD::SRA, dl, NVT, InH, // Sign extend high part.
1391 Lo = DAG.getNode(ISD::SRA, dl, NVT, InH, Amt); // Lo part from Hi part.
1419 SDValue Sh1 = DAG.getNode(Op2, dl, NVT, InL, DAG.getConstant(1, ShTy));
1421 SDValue Sh2 = DAG.getNode(Op2, dl, NVT, Sh1, Amt2);
1423 Lo = DAG.getNode(N->getOpcode(), dl, NVT, InL, Amt);
1424 Hi = DAG.getNode(ISD::OR, dl, NVT, DAG.getNode(Op1, dl, NVT, InH, Amt),Sh2);
1439 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1441 unsigned NVTBits = NVT.getSizeInBits();
1461 LoS = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt);
1462 HiS = DAG.getNode(ISD::OR, dl, NVT,
1463 DAG.getNode(ISD::SHL, dl, NVT, InH, Amt),
1466 DAG.getNode(ISD::SRL, dl, NVT, InL, AmtLack));
1469 LoL = DAG.getConstant(0, NVT); // Lo part is zero.
1470 HiL = DAG.getNode(ISD::SHL, dl, NVT, InL, AmtExcess); // Hi from Lo part.
1472 Lo = DAG.getNode(ISD::SELECT, dl, NVT, isShort, LoS, LoL);
1473 Hi = DAG.getNode(ISD::SELECT, dl, NVT, isShort, HiS, HiL);
1477 HiS = DAG.getNode(ISD::SRL, dl, NVT, InH, Amt);
1478 LoS = DAG.getNode(ISD::OR, dl, NVT,
1479 DAG.getNode(ISD::SRL, dl, NVT, InL, Amt),
1482 DAG.getNode(ISD::SHL, dl, NVT, InH, AmtLack));
1485 HiL = DAG.getConstant(0, NVT); // Hi part is zero.
1486 LoL = DAG.getNode(ISD::SRL, dl, NVT, InH, AmtExcess); // Lo from Hi part.
1488 Lo = DAG.getNode(ISD::SELECT, dl, NVT, isShort, LoS, LoL);
1489 Hi = DAG.getNode(ISD::SELECT, dl, NVT, isShort, HiS, HiL);
1493 HiS = DAG.getNode(ISD::SRA, dl, NVT, InH, Amt);
1494 LoS = DAG.getNode(ISD::OR, dl, NVT,
1495 DAG.getNode(ISD::SRL, dl, NVT, InL, Amt),
1498 DAG.getNode(ISD::SHL, dl, NVT, InH, AmtLack));
1501 HiL = DAG.getNode(ISD::SRA, dl, NVT, InH, // Sign of Hi part.
1503 LoL = DAG.getNode(ISD::SRA, dl, NVT, InH, AmtExcess); // Lo from Hi part.
1505 Lo = DAG.getNode(ISD::SELECT, dl, NVT, isShort, LoS, LoL);
1506 Hi = DAG.getNode(ISD::SELECT, dl, NVT, isShort, HiS, HiL);
1519 EVT NVT = LHSL.getValueType();
1531 TLI.getTypeToExpandTo(*DAG.getContext(), NVT));
1534 SDVTList VTList = DAG.getVTList(NVT, MVT::Glue);
1548 Lo = DAG.getNode(ISD::ADD, dl, NVT, LoOps, 2);
1549 Hi = DAG.getNode(ISD::ADD, dl, NVT, HiOps, 2);
1550 SDValue Cmp1 = DAG.getSetCC(dl, TLI.getSetCCResultType(NVT), Lo, LoOps[0],
1552 SDValue Carry1 = DAG.getNode(ISD::SELECT, dl, NVT, Cmp1,
1553 DAG.getConstant(1, NVT),
1554 DAG.getConstant(0, NVT));
1555 SDValue Cmp2 = DAG.getSetCC(dl, TLI.getSetCCResultType(NVT), Lo, LoOps[1],
1557 SDValue Carry2 = DAG.getNode(ISD::SELECT, dl, NVT, Cmp2,
1558 DAG.getConstant(1, NVT), Carry1);
1559 Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, Carry2);
1561 Lo = DAG.getNode(ISD::SUB, dl, NVT, LoOps, 2);
1562 Hi = DAG.getNode(ISD::SUB, dl, NVT, HiOps, 2);
1566 SDValue Borrow = DAG.getNode(ISD::SELECT, dl, NVT, Cmp,
1567 DAG.getConstant(1, NVT),
1568 DAG.getConstant(0, NVT));
1569 NVT, Hi, Borrow);
1627 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1630 if (Op.getValueType().bitsLE(NVT)) {
1632 Lo = DAG.getNode(ISD::ANY_EXTEND, dl, NVT, Op);
1633 Hi = DAG.getUNDEF(NVT); // The high part is undefined.
1652 EVT NVT = Lo.getValueType();
1654 unsigned NVTBits = NVT.getSizeInBits();
1658 Hi = DAG.getNode(ISD::AssertSext, dl, NVT, Hi,
1662 Lo = DAG.getNode(ISD::AssertSext, dl, NVT, Lo, DAG.getValueType(EVT));
1664 Hi = DAG.getNode(ISD::SRA, dl, NVT, Lo,
1673 EVT NVT = Lo.getValueType();
1675 unsigned NVTBits = NVT.getSizeInBits();
1679 Hi = DAG.getNode(ISD::AssertZext, dl, NVT, Hi,
1683 Lo = DAG.getNode(ISD::AssertZext, dl, NVT, Lo, DAG.getValueType(EVT));
1685 Hi = DAG.getConstant(0, NVT);
1699 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1700 unsigned NBitWidth = NVT.getSizeInBits();
1702 Lo = DAG.getConstant(Cst.trunc(NBitWidth), NVT);
1703 Hi = DAG.getConstant(Cst.lshr(NBitWidth).trunc(NBitWidth), NVT);
1711 EVT NVT = Lo.getValueType();
1713 SDValue HiNotZero = DAG.getSetCC(dl, TLI.getSetCCResultType(NVT), Hi,
1714 DAG.getConstant(0, NVT), ISD::SETNE);
1716 SDValue LoLZ = DAG.getNode(N->getOpcode(), dl, NVT, Lo);
1717 SDValue HiLZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, NVT, Hi);
1719 Lo = DAG.getNode(ISD::SELECT, dl, NVT, HiNotZero, HiLZ,
1720 DAG.getNode(ISD::ADD, dl, NVT, LoLZ,
1721 DAG.getConstant(NVT.getSizeInBits(), NVT)));
1722 Hi = DAG.getConstant(0, NVT);
1730 EVT NVT = Lo.getValueType();
1731 Lo = DAG.getNode(ISD::ADD, dl, NVT, DAG.getNode(ISD::CTPOP, dl, NVT, Lo),
1732 DAG.getNode(ISD::CTPOP, dl, NVT, Hi));
1733 Hi = DAG.getConstant(0, NVT);
1741 EVT NVT = Lo.getValueType();
1743 SDValue LoNotZero = DAG.getSetCC(dl, TLI.getSetCCResultType(NVT), Lo,
1744 DAG.getConstant(0, NVT), ISD::SETNE);
1746 SDValue LoLZ = DAG.getNode(ISD::CTTZ_ZERO_UNDEF, dl, NVT, Lo);
1747 SDValue HiLZ = DAG.getNode(N->getOpcode(), dl, NVT, Hi);
1749 Lo = DAG.getNode(ISD::SELECT, dl, NVT, LoNotZero, LoLZ,
1750 DAG.getNode(ISD::ADD, dl, NVT, HiLZ,
1751 DAG.getConstant(NVT.getSizeInBits(), NVT)));
1752 Hi = DAG.getConstant(0, NVT);
1785 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1795 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1797 if (N->getMemoryVT().bitsLE(NVT)) {
1800 Lo = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(),
1810 Hi = DAG.getNode(ISD::SRA, dl, NVT, Lo,
1814 Hi = DAG.getConstant(0, NVT);
1818 Hi = DAG.getUNDEF(NVT);
1822 Lo = DAG.getLoad(NVT, dl, Ch, Ptr, N->getPointerInfo(),
1826 N->getMemoryVT().getSizeInBits() - NVT.getSizeInBits();
1830 unsigned IncrementSize = NVT.getSizeInBits()/8;
1833 Hi = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr,
1847 unsigned IncrementSize = NVT.getSizeInBits()/8;
1851 Hi = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(),
1860 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, NVT, Ch, Ptr,
1871 if (ExcessBits < NVT.getSizeInBits()) {
1873 Lo = DAG.getNode(ISD::OR, dl, NVT, Lo,
1874 DAG.getNode(ISD::SHL, dl, NVT, Hi,
1879 NVT, Hi,
1880 DAG.getConstant(NVT.getSizeInBits() - ExcessBits,
1903 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1906 bool HasMULHS = TLI.isOperationLegalOrCustom(ISD::MULHS, NVT);
1907 bool HasMULHU = TLI.isOperationLegalOrCustom(ISD::MULHU, NVT);
1908 bool HasSMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::SMUL_LOHI, NVT);
1909 bool HasUMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::UMUL_LOHI, NVT);
1915 unsigned InnerBitSize = NVT.getSizeInBits();
1925 Lo = DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(NVT, NVT), LL, RL);
1931 Lo = DAG.getNode(ISD::MUL, dl, NVT, LL, RL);
1932 Hi = DAG.getNode(ISD::MULHU, dl, NVT, LL, RL);
1940 Lo = DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(NVT, NVT), LL, RL);
1946 Lo = DAG.getNode(ISD::MUL, dl, NVT, LL, RL);
1947 Hi = DAG.getNode(ISD::MULHS, dl, NVT, LL, RL);
1954 DAG.getVTList(NVT, NVT), LL, RL);
1957 RH = DAG.getNode(ISD::MUL, dl, NVT, LL, RH);
1958 LH = DAG.getNode(ISD::MUL, dl, NVT, LH, RL);
1959 Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, RH);
1960 Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, LH);
1964 Lo = DAG.getNode(ISD::MUL, dl, NVT, LL, RL);
1965 NVT, LL, RL);
1966 RH = DAG.getNode(ISD::MUL, dl, NVT, LL, RH);
1967 LH = DAG.getNode(ISD::MUL, dl, NVT, LH, RL);
1968 Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, RH);
1969 Hi = DAG.getNode(ISD::ADD, dl, NVT, Hi, LH);
2080 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2081 TargetLowering::LegalizeAction Action = TLI.getOperationAction(PartsOpc, NVT);
2082 if ((Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) ||
2143 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2146 if (Op.getValueType().bitsLE(NVT)) {
2148 Lo = DAG.getNode(ISD::SIGN_EXTEND, dl, NVT, N->getOperand(0));
2150 unsigned LoSize = NVT.getSizeInBits();
2151 Hi = DAG.getNode(ISD::SRA, dl, NVT, Lo,
2165 Op.getValueType().getSizeInBits() - NVT.getSizeInBits();
2221 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2223 Lo = DAG.getNode(ISD::TRUNCATE, dl, NVT, N->getOperand(0));
2226 DAG.getConstant(NVT.getSizeInBits(), TLI.getPointerTy()));
2227 Hi = DAG.getNode(ISD::TRUNCATE, dl, NVT, Hi);
2378 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2381 if (Op.getValueType().bitsLE(NVT)) {
2383 Lo = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, N->getOperand(0));
2384 Hi = DAG.getConstant(0, NVT); // The high part is just a zero.
2397 Op.getValueType().getSizeInBits() - NVT.getSizeInBits();
2671 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2680 assert(NVT.isByteSized() && "Expanded type not byte sized!");
2682 if (N->getMemoryVT().bitsLE(NVT)) {
2697 N->getMemoryVT().getSizeInBits() - NVT.getSizeInBits();
2701 unsigned IncrementSize = NVT.getSizeInBits()/8;
2717 unsigned IncrementSize = NVT.getSizeInBits()/8;
2722 if (ExcessBits < NVT.getSizeInBits()) {
2724 Hi = DAG.getNode(ISD::SHL, dl, NVT, Hi,
2725 DAG.getConstant(NVT.getSizeInBits() - ExcessBits,
2727 Hi = DAG.getNode(ISD::OR, dl, NVT, Hi,
2728 DAG.getNode(ISD::SRL, dl, NVT, Lo,
