Lines Matching defs:regA
100 bool isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
108 bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB);
113 unsigned RegA, unsigned RegB, unsigned Dist);
456 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
457 if (RegA == RegB)
459 if (!RegA || !RegB)
461 return TRI->regsOverlap(RegA, RegB);
468 TwoAddressInstructionPass::isProfitableToCommute(unsigned regA, unsigned regB,
506 unsigned ToRegA = getMappedReg(regA, DstRegMap);
567 unsigned RegA = MI->getOperand(0).getReg();
568 SrcRegMap[RegA] = FromRegC;
577 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){
587 unsigned ToRegA = getMappedReg(RegA, DstRegMap);
597 unsigned RegA, unsigned RegB,
623 SrcRegMap.erase(RegA);
1025 unsigned regA = MI.getOperand(DstIdx).getReg();
1032 if (TargetRegisterInfo::isVirtualRegister(regA))
1033 ScanUses(regA, &*mbbi, Processed);
1054 else if (isProfitableToCommute(regA, regB, regC, &MI, mbbi, Dist)) {
1079 if (!regBKilled || isProfitableToConv3Addr(regA, regB)) {
1081 if (ConvertInstTo3Addr(mi, nmi, mbbi, regA, regB, Dist)) {
1141 unsigned NewDstIdx = NewMIs[1]->findRegisterDefOperandIdx(regA);
1254 unsigned RegA = DstMO.getReg();
1261 if (RegA == RegB) {
1268 LastCopiedReg = RegA;
1280 MI->getOperand(i).getReg() != RegA);
1285 TII->get(TargetOpcode::COPY), RegA).addReg(RegB);
1307 // Make sure regA is a legal regclass for the SrcIdx operand.
1308 if (TargetRegisterInfo::isVirtualRegister(RegA) &&
1310 MRI->constrainRegClass(RegA, MRI->getRegClass(RegB));
1312 MO.setReg(RegA);
1315 SrcRegMap[RegA] = RegB;