Lines Matching refs:L2
46 0x08 remote_cache_local_home_hit Counts number of memory load instructions retired where the memory reference missed the L1, L2 and LLC caches and HIT in a remote socket's cache
47 0x10 remote_dram Counts number of memory load instructions retired where the memory reference missed the L1, L2 and LLC caches and was remotely homed
48 0x20 local_dram Counts number of memory load instructions retired where the memory reference missed the L1, L2 and LLC caches and required a local socket memory reference
81 0x01 ld_hit Counts number of loads that hit the L2 cache
82 0x02 ld_miss Counts the number of loads that miss the L2 cache
83 0x03 loads Counts all L2 load requests
84 0x04 rfo_hit Counts the number of store RFO requests that hit the L2 cache
85 0x08 rfo_miss Counts the number of store RFO requests that miss the L2 cache
86 0x0C rfos Counts all L2 store RFO requests
87 0x10 ifetch_hit Counts number of instruction fetches that hit the L2 cache
88 0x20 ifetch_miss Counts number of instruction fetches that miss the L2 cache
90 0x40 prefetch_hit Counts L2 prefetch hits for both code and data
91 0x80 prefetch_miss Counts L2 prefetch misses for both code and data
92 0xC0 prefetches Counts all L2 prefetches for both code and data
93 0xAA miss Counts all L2 misses for both code and data
94 0xFF references Counts all L2 requests for both code and data
96 0x01 i_state Counts number of L2 data demand loads where the cache line to be loaded is in the I (invalid) state, i
97 0x02 s_state Counts number of L2 data demand loads where the cache line to be loaded is in the S (shared) state
98 0x04 e_state Counts number of L2 data demand loads where the cache line to be loaded is in the E (exclusive) state
99 0x08 m_state Counts number of L2 data demand loads where the cache line to be loaded is in the M (modified) state
100 0x0F mesi Counts all L2 data demand requests
101 0x10 i_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the I (invalid) state, i
102 0x20 s_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the S (shared) state
103 0x40 e_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the E (exclusive) state
104 0x80 m_state Counts number of L2 prefetch data loads where the cache line to be loaded is in the M (modified) state
105 0xF0 mesi Counts all L2 prefetch requests
106 0xFF any Counts all L2 data requests
108 0x01 i_state Counts number of L2 demand store RFO requests where the cache line to be loaded is in the I (invalid) state, i
109 0x02 s_state Counts number of L2 store RFO requests where the cache line to be loaded is in the S (shared) state
110 0x04 e_state Counts number of L2 store RFO requests where the cache line to be loaded is in the E (exclusive) state
111 0x08 m_state Counts number of L2 store RFO requests where the cache line to be loaded is in the M (modified) state
112 0x0E hit Counts number of L2 store RFO requests where the cache line to be loaded is in either the S, E or M states
113 0x0F mesi Counts all L2 store RFO requests
114 0x10 i_state Counts number of L2 demand lock RFO requests where the cache line to be loaded is in the I (invalid) state, i
115 0x20 s_state Counts number of L2 lock RFO requests where the cache line to be loaded is in the S (shared) state
116 0x40 e_state Counts number of L2 demand lock RFO requests where the cache line to be loaded is in the E (exclusive) state
117 0x80 m_state Counts number of L2 demand lock RFO requests where the cache line to be loaded is in the M (modified) state
118 0xE0 hit Counts number of L2 demand lock RFO requests where the cache line to be loaded is in either the S, E, or M state
119 0xF0 mesi Counts all L2 demand lock RFO requests
121 0x01 i_state Counts number of L1 writebacks to the L2 where the cache line to be written is in the I (invalid) state, i
122 0x02 s_state Counts number of L1 writebacks to the L2 where the cache line to be written is in the S state
123 0x04 e_state Counts number of L1 writebacks to the L2 where the cache line to be written is in the E (exclusive) state
124 0x08 m_state Counts number of L1 writebacks to the L2 where the cache line to be written is in the M (modified) state
125 0x0F mesi Counts all L1 writebacks to the L2
183 0x01 l1d_l2 Cycle count during which the L1D and L2 are locked
298 0x02 l2_hit Counts number of retired loads that hit the L2 data cache
300 0x08 other_core_l2_hit_hitm Counts number of retired loads that hit in a sibling core's L2 (on die core)
328 0x01 load Counts L2 load operations due to HW prefetch or demand loads
329 0x02 rfo Counts L2 RFO operations due to HW prefetch or demand RFOs
330 0x04 ifetch Counts L2 instruction fetch operations due to HW prefetch or demand ifetch
331 0x08 prefetch Counts L2 prefetch operations
332 0x10 l1d_wb Counts L1D writeback operations to the L2
333 0x20 fill Counts L2 cache line fill operations due to load, RFO, L1D writeback or prefetch
334 0x40 wb Counts L2 writeback operations to the LLC
335 0x80 any Counts all L2 cache operations
337 0x02 s_state Counts the number of cache lines allocated in the L2 cache in the S (shared) state
338 0x04 e_state Counts the number of cache lines allocated in the L2 cache in the E (exclusive) state
339 0x07 any Counts the number of cache lines allocated in the L2 cache
341 0x01 demand_clean Counts L2 clean cache lines evicted by a demand request
342 0x02 demand_dirty Counts L2 dirty (modified) cache lines evicted by a demand request
343 0x04 prefetch_clean Counts L2 clean cache line evicted by a prefetch request
344 0x08 prefetch_dirty Counts L2 modified cache line evicted by a prefetch request
345 0x0F any Counts all L2 cache lines evicted for any reason
347 0x01 hit Count L2 HW prefetcher detector hits
348 0x02 alloc Count L2 HW prefetcher allocations
349 0x04 data_trigger Count L2 HW data prefetcher triggered
350 0x08 code_trigger Count L2 HW code prefetcher triggered
351 0x10 dca_trigger Count L2 HW DCA prefetcher triggered
352 0x20 kick_start Count L2 HW prefetcher kick started
354 0x01 promotion Counts the number of L2 secondary misses that hit the Super Queue
355 0x02 promotion_post_go Counts the number of L2 secondary misses during the Super Queue filling L2
357 0x08 fill_dropped Counts the number of SQ L2 fills dropped due to L2 busy
