Lines Matching refs:vex_printf
62 vex_printf("%s", ireg32_names[r]);
67 vex_printf("%%fake%d", r);
72 vex_printf("%%xmm%d", r);
195 vex_printf("(");
197 vex_printf("0x%x(", am->Xam.IR.imm);
199 vex_printf(")");
202 vex_printf("0x%x(", am->Xam.IRRS.imm);
204 vex_printf(",");
206 vex_printf(",%d)", 1 << am->Xam.IRRS.shift);
265 vex_printf("$0x%x", op->Xrmi.Imm.imm32);
330 vex_printf("$0x%x", op->Xri.Imm.imm32);
894 vex_printf("%sl ", showX86AluOp(i->Xin.Alu32R.op));
896 vex_printf(",");
900 vex_printf("%sl ", showX86AluOp(i->Xin.Alu32M.op));
902 vex_printf(",");
906 vex_printf("%sl ", showX86ShiftOp(i->Xin.Sh32.op));
908 vex_printf("%%cl,");
910 vex_printf("$%d,", (Int)i->Xin.Sh32.src);
914 vex_printf("testl $%d,", (Int)i->Xin.Test32.imm32);
918 vex_printf("%sl ", showX86UnaryOp(i->Xin.Unary32.op));
922 vex_printf("leal ");
924 vex_printf(",");
928 vex_printf("%cmull ", i->Xin.MulL.syned ? 's' : 'u');
932 vex_printf("%cdivl ", i->Xin.Div.syned ? 's' : 'u');
936 vex_printf("%sdl ", showX86ShiftOp(i->Xin.Sh3232.op));
938 vex_printf(" %%cl,");
940 vex_printf(" $%d,", (Int)i->Xin.Sh3232.amt);
942 vex_printf(",");
946 vex_printf("pushl ");
950 vex_printf("call%s[%d] ",
954 vex_printf("0x%x", i->Xin.Call.target);
958 vex_printf("if (%%eflags.%s) { ",
964 vex_printf("movl $");
966 vex_printf(",%%ebp ; ");
968 vex_printf("movl ");
970 vex_printf(",%%eax ; movl $dispatcher_addr,%%edx ; jmp *%%edx");
972 vex_printf(" }");
976 vex_printf("cmov%s ", showX86CondCode(i->Xin.CMov32.cond));
978 vex_printf(",");
982 vex_printf("mov%c%cl ",
986 vex_printf(",");
990 vex_printf("mov%c ", i->Xin.Store.sz==1 ? 'b' : 'w');
992 vex_printf(",");
996 vex_printf("setl%s ", showX86CondCode(i->Xin.Set32.cond));
1000 vex_printf("bs%cl ", i->Xin.Bsfr32.isFwds ? 'f' : 'r');
1002 vex_printf(",");
1006 vex_printf("mfence(%s)",
1010 vex_printf("lock cmpxchg%c ",
1013 vex_printf("{%%eax->%%ebx},");
1017 vex_printf("lock cmpxchg8b {%%edx:%%eax->%%ecx:%%ebx},");
1021 vex_printf("g%sD ", showX86FpOp(i->Xin.FpUnary.op));
1023 vex_printf(",");
1027 vex_printf("g%sD ", showX86FpOp(i->Xin.FpBinary.op));
1029 vex_printf(",");
1031 vex_printf(",");
1036 vex_printf("gld%c " , i->Xin.FpLdSt.sz==10 ? 'T'
1039 vex_printf(", ");
1042 vex_printf("gst%c " , i->Xin.FpLdSt.sz==10 ? 'T'
1045 vex_printf(", ");
1051 vex_printf("gild%s ", i->Xin.FpLdStI.sz==8 ? "ll" :
1054 vex_printf(", ");
1057 vex_printf("gist%s ", i->Xin.FpLdStI.sz==8 ? "ll" :
1060 vex_printf(", ");
1065 vex_printf("gdtof ");
1067 vex_printf(",");
1071 vex_printf("gcmov%s ", showX86CondCode(i->Xin.FpCMov.cond));
1073 vex_printf(",");
1077 vex_printf("fldcw ");
1081 vex_printf("fstsw %%ax");
1084 vex_printf("gcmp ");
1086 vex_printf(",");
1088 vex_printf(",");
1092 vex_printf("const $0x%04x,", (Int)i->Xin.SseConst.con);
1096 vex_printf("movups ");
1099 vex_printf(",");
1103 vex_printf(",");
1108 vex_printf("movs%s ", i->Xin.SseLdzLO.sz==4 ? "s" : "d");
1110 vex_printf(",");
1114 vex_printf("%sps ", showX86SseOp(i->Xin.Sse32Fx4.op));
1116 vex_printf(",");
1120 vex_printf("%sss ", showX86SseOp(i->Xin.Sse32FLo.op));
1122 vex_printf(",");
1126 vex_printf("%spd ", showX86SseOp(i->Xin.Sse64Fx2.op));
1128 vex_printf(",");
1132 vex_printf("%ssd ", showX86SseOp(i->Xin.Sse64FLo.op));
1134 vex_printf(",");
1138 vex_printf("%s ", showX86SseOp(i->Xin.SseReRg.op));
1140 vex_printf(",");
1144 vex_printf("cmov%s ", showX86CondCode(i->Xin.SseCMov.cond));
1146 vex_printf(",");
1150 vex_printf("pshufd $0x%x,", i->Xin.SseShuf.order);
1152 vex_printf(",");
2009 /* vex_printf("asm ");ppX86Instr(i, mode64); vex_printf("\n"); */
2538 if (0) vex_printf("EMIT FENCE\n");
