Lines Matching refs:F64
291 Double F64;
536 /* :: IRRoundingMode(I32) x F64 x F64 -> F64 */
544 /* :: IRRoundingMode(I32) x F64 x F64 -> F64 */
548 /* :: F64 -> F64 */
555 /* :: IRRoundingMode(I32) x F64 -> F64 */
569 /* :: F64 x F64 -> IRCmpF64Result(I32) */
615 Iop_F64toI16S, /* IRRoundingMode(I32) x F64 -> signed I16 */
616 Iop_F64toI32S, /* IRRoundingMode(I32) x F64 -> signed I32 */
617 Iop_F64toI64S, /* IRRoundingMode(I32) x F64 -> signed I64 */
618 Iop_F64toI64U, /* IRRoundingMode(I32) x F64 -> unsigned I64 */
620 Iop_F64toI32U, /* IRRoundingMode(I32) x F64 -> unsigned I32 */
622 Iop_I16StoF64, /* signed I16 -> F64 */
623 Iop_I32StoF64, /* signed I32 -> F64 */
624 Iop_I64StoF64, /* IRRoundingMode(I32) x signed I64 -> F64 */
625 Iop_I64UtoF64, /* IRRoundingMode(I32) x unsigned I64 -> F64 */
628 Iop_I32UtoF64, /* unsigned I32 -> F64 */
639 Iop_F32toF64, /* F32 -> F64 */
640 Iop_F64toF32, /* IRRoundingMode(I32) x F64 -> F32 */
642 /* Reinterpretation. Take an F64 and produce an I64 with
649 Iop_F128HItoF64,/* F128 -> high half of F128 into a F64 register */
650 Iop_F128LOtoF64,/* F128 -> low half of F128 into a F64 register */
664 Iop_F64toF128, /* F64 -> F128 */
668 Iop_F128toF64, /* IRRoundingMode(I32) x F128 -> F64 */
674 /* :: IRRoundingMode(I32) x F64 x F64 -> F64 */
688 /* :: IRRoundingMode(I32) x F64 -> F64 */
693 Iop_RoundF64toInt, /* F64 value to nearest integral value (still
694 as F64) */
711 /* :: IRRoundingMode(I32) x F64 x F64 x F64 -> F64
717 /* :: IRRoundingMode(I32) x F64 x F64 x F64 -> F64 */
720 /* :: F64 -> F64 */
727 /* :: F64 -> F32 */
728 Iop_TruncF64asF32, /* do F64->F32 truncation as per 'fsts' */
730 /* :: IRRoundingMode(I32) x F64 -> F64 */
731 Iop_RoundF64toF32, /* round F64 to nearest F32 value (still as F64) */
735 /* :: F64 -> I32 */
1391 describes an array of 8 F64-typed values, the
