Lines Matching full:misses
79 ULong m1; /* misses in the first level cache */
80 ULong mL; /* misses in the second level cache */
1243 // Total reads/writes/misses. Calculated during CC traversal at the end.
1491 VG_(umsg)(fmt, "I1 misses: ", Ir_total.m1);
1492 VG_(umsg)(fmt, "LLi misses: ", Ir_total.mL);
1514 VG_(umsg)(fmt, "D1 misses: ",
1516 VG_(umsg)(fmt, "LLd misses: ",
1544 VG_(umsg)(fmt, "LL misses: ",
