| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 32 Hi, Lo, // Hi/Lo operations, typically on a global address.
|
| SparcISelLowering.cpp | 473 SDValue Hi = DAG.getLoad(MVT::i32, dl, Store, StackPtr,
483 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Hi));
504 MemOpChains.push_back(DAG.getStore(Chain, dl, Hi, PtrOff,
708 // Custom legalize GlobalAddress nodes into LO/HI parts.
[all...] |
| /external/webkit/Tools/Scripts/webkitpy/tool/bot/ |
| irc_command.py | 106 class Hi(IRCCommand):
141 "hi": Hi,
|
| /external/llvm/lib/MC/ |
| SubtargetFeature.cpp | 127 const T *Hi = A + L;
129 const T *F = std::lower_bound(A, Hi, KV);
131 if (F == Hi || StringRef(F->Key) != S) return NULL;
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.h | 31 Hi, ///< High address component (upper 16)
|
| SPUISelLowering.cpp | 57 bool isSigned, SDValue &Hi, const SPUTargetLowering &TLI) {
486 case SPUISD::Hi: return "SPUISD::Hi";
615 && basePtr.getOperand(0).getOpcode() == SPUISD::Hi
962 SDValue hi = DAG.getLoad(MVT::i128, dl, the_chain, local
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 42 Hi, Lo, // Hi/Lo operations, typically on a global address.
|
| /external/llvm/lib/Target/Mips/ |
| MipsJITInfo.cpp | 171 // lui $t9, %hi(NewVal)
176 int Hi = ((unsigned)NewVal & 0xffff0000) >> 16;
178 Hi++;
181 *(intptr_t *)(StubAddr) = 0xf << 26 | 25 << 16 | Hi;
216 int Hi = ((unsigned)EmittedAddr & 0xffff0000) >> 16;
218 Hi++;
221 // lui t9, %hi(EmittedAddr)
225 JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi);
|
| MipsISelLowering.h | 33 // No relation with Mips Hi register
34 Hi,
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| MipsLongBranch.cpp | 263 int64_t Hi = SignExtend64<16>(((Offset + 0x8000) >> 16) & 0xffff);
270 // lui $at, %hi($tgt - $baltgt)
287 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi)
308 // daddiu $at, $at, %hi($tgt - $baltgt)
337 .addReg(Mips::AT_64).addImm(Hi);
|
| MipsISelDAGToDAG.cpp | 146 // lui $v0, %hi(%neg(%gp_rel(fname)))
173 // lui $v0, %hi(__gnu_local_gp)
186 // lui $v0, %hi(%neg(%gp_rel(fname)))
203 // 0. lui $2, %hi(_gp_disp)
334 // lui $2, %hi($CPI1_0)
338 // lui $2, %hi($CPI1_0)
369 SDNode *Lo = 0, *Hi = 0;
380 Hi = CurDAG->getMachineNode(Ty == MVT::i32 ? Mips::MFHI : Mips::MFHI64, dl,
383 return std::make_pair(Lo, Hi);
|
| MipsISelLowering.cpp | 61 case MipsISD::Hi: return "MipsISD::Hi";
332 // Hi0: initial value of Hi register
386 Mips::HI, MVT::i32,
405 // Hi0: initial value of Hi register
459 Mips::HI, MVT::i32,
506 unsigned HI = (Ty == MVT::i32) ? Mips::HI : Mips::HI64;
528 HI, Ty, InGlue);
[all...] |
| /external/llvm/include/llvm/Support/ |
| GCOV.h | 139 uint64_t Hi = readInt();
140 uint64_t Result = Lo | (Hi << 32);
|
| MathExtras.h | 218 // get hi portion
219 uint32_t Hi = Hi_32(Value);
221 // if some bits in hi portion
222 if (Hi) {
223 // leading zeros in hi portion plus all bits in lo portion
224 Count = CountLeadingZeros_32(Hi);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 55 /// Hi/Lo - These represent the high and low 16-bit parts of a global
60 Hi, Lo,
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| PPCISelDAGToDAG.cpp | 790 unsigned Hi = (Imm >> 16) & 0xFFFF;
797 // Handle the Hi bits.
798 unsigned OpC = Hi ? PPC::LIS8 : PPC::LI8;
799 Result = CurDAG->getMachineNode(OpC, dl, MVT::i64, getI32Imm(Hi));
804 // Just the Hi bits.
805 Result = CurDAG->getMachineNode(PPC::LIS8, dl, MVT::i64, getI32Imm(Hi));
820 if ((Hi = (Remainder >> 16) & 0xFFFF)) {
822 SDValue(Result, 0), getI32Imm(Hi));
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypesGeneric.cpp | 14 // computation in two identical registers of a smaller type. The Lo/Hi part
30 // These routines assume that the Lo/Hi part is stored first in memory on
31 // little/big-endian machines, followed by the Hi/Lo part. This means that
34 SDValue &Lo, SDValue &Hi) {
36 GetExpandedOp(Op, Lo, Hi);
39 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
53 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
55 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
60 GetExpandedOp(InOp, Lo, Hi);
[all...] |
| LegalizeDAG.cpp | 397 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount);
401 Store1 = DAG.getTruncStore(Chain, dl, TLI.isLittleEndian()?Lo:Hi, Ptr,
407 Store2 = DAG.getTruncStore(Chain, dl, TLI.isLittleEndian()?Hi:Lo, Ptr,
523 // If the original load is NON_EXTLOAD, the hi part load must be ZEXTLOAD.
528 SDValue Lo, Hi;
535 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr,
540 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, LD->getPointerInfo(),
553 TLI.getShiftAmountTy(Hi.getValueType()));
554 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount);
558 Hi.getValue(1))
[all...] |
| LegalizeFloatTypes.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 237 SDValue Lo, Hi;
238 GetSplitVector(N->getOperand(0), Lo, Hi);
240 Hi = BitConvertToInteger(Hi);
243 std::swap(Lo, Hi);
248 JoinIntegers(Lo, Hi));
663 SDValue Hi = DAG.getNode(ISD::SRL, DL, Mul.getValueType(), Mul,
665 Overflow = DAG.getSetCC(DL, N->getValueType(1), Hi,
666 DAG.getConstant(0, Hi.getValueType()), ISD::SETNE);
[all...] |
| LegalizeVectorTypes.cpp | 459 SDValue Lo, Hi;
475 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
477 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
478 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
479 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
480 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
481 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
482 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
483 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
484 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break
[all...] |
| /external/skia/src/core/ |
| SkMath.cpp | 103 int32_t hi = A + (B >> 16) + (lo < C); local
106 hi = -hi - Sk32ToBool(lo);
112 SkASSERT(((int32_t)lo >> 31) == hi);
116 return hi >> (shift - 32);
119 int32_t tmp = hi >> shift;
122 // we want (hi << (32 - shift)) | (lo >> shift) but rounded
124 return ((hi << (32 - shift)) | (lo >> shift)) + roundBit;
183 uint32_t Hi = A + (B >>16) + (Lo < C);
185 SkASSERT((Hi >> 29) == 0); // else overflo
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 570 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl,
573 SDValue Lo(Hi.getNode(), 1);
574 SDValue Ops[] = { Lo, Hi };
587 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl,
590 SDValue Lo(Hi.getNode(), 1);
591 SDValue Ops[] = { Lo, Hi };
684 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl,
687 SDValue Lo(Hi.getNode(), 1);
688 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi);
692 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl
[all...] |
| /external/openssl/crypto/modes/ |
| gcm128.c | 75 V.lo = (V.hi<<63)|(V.lo>>1); \
76 V.hi = (V.hi>>1 )^T; \
80 V.lo = (V.hi<<63)|(V.lo>>1); \
81 V.hi = (V.hi>>1 )^((u64)T<<32); \
126 Htable[0].hi = 0;
128 V.hi = H[0];
137 u128 *Hi = Htable+i, H0 = *Hi;
[all...] |
| /external/clang/lib/Sema/ |
| SemaStmt.cpp | 828 Expr *Hi = CR->getRHS();
835 CheckConvertedConstantExpression(Hi, CondType, HiVal,
841 Hi = ConvHi.take();
843 HiVal = Hi->EvaluateKnownConstInt(Context);
847 Hi = DefaultLvalueConversion(Hi).take();
848 Hi = ImpCastExprToType(Hi, CondType, CK_IntegralCast).take();
853 Hi->getLocStart(),
856 CR->setRHS(Hi);
[all...] |
