| /external/llvm/lib/Transforms/Utils/ |
| BypassSlowDivision.cpp | 84 Instruction *Instr = J;
85 Value *Dividend = Instr->getOperand(0);
86 Value *Divisor = Instr->getOperand(1);
141 PHINode *QuoPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2);
144 PHINode *RemPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2);
148 // Replace Instr with appropriate phi node
150 Instr->replaceAllUsesWith(QuoPhi);
152 Instr->replaceAllUsesWith(RemPhi);
153 Instr->eraseFromParent();
192 Instruction *Instr = J
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 309 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
310 assert(Instr && "Missing target independent instruction");
311 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
312 InstrsByEnum.push_back(Instr);
323 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
|
| InstrInfoEmitter.cpp | 236 const CodeGenInstruction *Instr = NumberedInstructions[i];
237 InstrNames.add(Instr->TheDef->getName());
249 const CodeGenInstruction *Instr = NumberedInstructions[i];
250 OS << InstrNames.get(Instr->TheDef->getName()) << "U, ";
|
| CodeGenDAGPatterns.cpp | [all...] |
| /external/v8/src/mips/ |
| constants-mips.h | 172 typedef int32_t Instr;
570 extern const Instr kPopInstruction;
572 extern const Instr kPushInstruction;
574 extern const Instr kPushRegPattern;
576 extern const Instr kPopRegPattern;
577 extern const Instr kLwRegFpOffsetPattern;
578 extern const Instr kSwRegFpOffsetPattern;
579 extern const Instr kLwRegFpNegOffsetPattern;
580 extern const Instr kSwRegFpNegOffsetPattern;
582 extern const Instr kRtMask
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| VectorElementize.cpp | 102 void createVecShuffle(MachineFunction& F, MachineInstr *Instr,
105 void createVecExtract(MachineFunction& F, MachineInstr *Instr,
108 void createVecInsert(MachineFunction& F, MachineInstr *Instr,
111 void createVecBuild(MachineFunction& F, MachineInstr *Instr,
166 ///Instr is assumed to be a vector instruction. For most vector instructions,
172 unsigned VectorElementize::numCopiesNeeded(MachineInstr *Instr) {
175 for (unsigned i=0, e=Instr->getNumOperands(); i!=e; ++i) {
176 MachineOperand oper = Instr->getOperand(i);
186 unsigned regnum = Instr->getOperand(def).getReg();
187 if (ISVECEXTRACT(Instr))
[all...] |
| /external/llvm/tools/llvm-stress/ |
| llvm-stress.cpp | 667 Instruction *Instr = *it;
668 BasicBlock *Curr = Instr->getParent();
669 BasicBlock::iterator Loc= Instr;
671 Instr->moveBefore(Curr->getTerminator());
673 BranchInst::Create(Curr, Next, Instr, Curr->getTerminator());
|
| /external/llvm/include/llvm/CodeGen/ |
| ScheduleDAG.h | 251 MachineInstr *Instr; // Alternatively, a MachineInstr.
304 : Node(node), Instr(0), OrigNode(0), NodeNum(nodenum),
317 SUnit(MachineInstr *instr, unsigned nodenum)
318 : Node(0), Instr(instr), OrigNode(0), NodeNum(nodenum),
331 : Node(0), Instr(0), OrigNode(0), NodeNum(~0u),
345 assert(!Instr && "Setting SDNode of SUnit with MachineInstr!");
352 assert(!Instr && "Reading SDNode of SUnit with MachineInstr!");
358 bool isInstr() const { return Instr; }
364 Instr = MI
[all...] |
| /external/llvm/lib/MC/ |
| MCDwarf.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 555 // If this machine instr is an inline asm, measure it.
579 // If this machine instr is a constant pool entry, its size is recorded as
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
| /external/v8/src/arm/ |
| constants-arm.h | 116 // General constants are in an anonymous enum in class Instr.
181 // Instr is merely used by the Assembler to distinguish 32bit integers
185 typedef int32_t Instr;
446 extern const Instr kPopInstruction;
450 extern const Instr kPushRegPattern;
454 extern const Instr kPopRegPattern;
457 extern const Instr kMovLrPc;
459 extern const Instr kLdrPCMask;
460 extern const Instr kLdrPCPattern;
462 extern const Instr kBlxRegMask
[all...] |
| /external/llvm/lib/VMCore/ |
| Core.cpp | [all...] |
